1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright 2019 Unisoc Inc. 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: SC9863A Clock Control Unit 9 10maintainers: 11 - Orson Zhai <orsonzhai@gmail.com> 12 - Baolin Wang <baolin.wang7@gmail.com> 13 - Chunyan Zhang <zhang.lyra@gmail.com> 14 15properties: 16 "#clock-cells": 17 const: 1 18 19 compatible: 20 enum: 21 - sprd,sc9863a-ap-clk 22 - sprd,sc9863a-aon-clk 23 - sprd,sc9863a-apahb-gate 24 - sprd,sc9863a-pmu-gate 25 - sprd,sc9863a-aonapb-gate 26 - sprd,sc9863a-pll 27 - sprd,sc9863a-mpll 28 - sprd,sc9863a-rpll 29 - sprd,sc9863a-dpll 30 - sprd,sc9863a-mm-gate 31 - sprd,sc9863a-mm-clk 32 - sprd,sc9863a-apapb-gate 33 34 clocks: 35 minItems: 1 36 maxItems: 4 37 description: | 38 The input parent clock(s) phandle for this clock, only list fixed 39 clocks which are declared in devicetree. 40 41 clock-names: 42 minItems: 1 43 items: 44 - const: ext-26m 45 - const: ext-32k 46 - const: ext-4m 47 - const: rco-100m 48 49 reg: 50 maxItems: 1 51 52required: 53 - compatible 54 - '#clock-cells' 55 56if: 57 properties: 58 compatible: 59 enum: 60 - sprd,sc9863a-ap-clk 61 - sprd,sc9863a-aon-clk 62then: 63 required: 64 - reg 65 66else: 67 description: | 68 Other SC9863a clock nodes should be the child of a syscon node in 69 which compatible string shoule be: 70 "sprd,sc9863a-glbregs", "syscon", "simple-mfd" 71 72 The 'reg' property for the clock node is also required if there is a sub 73 range of registers for the clocks. 74 75additionalProperties: false 76 77examples: 78 - | 79 ap_clk: clock-controller@21500000 { 80 compatible = "sprd,sc9863a-ap-clk"; 81 reg = <0x21500000 0x1000>; 82 clocks = <&ext_26m>, <&ext_32k>; 83 clock-names = "ext-26m", "ext-32k"; 84 #clock-cells = <1>; 85 }; 86 87 - | 88 syscon@20e00000 { 89 compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd"; 90 reg = <0x20e00000 0x4000>; 91 #address-cells = <1>; 92 #size-cells = <1>; 93 ranges = <0 0x20e00000 0x4000>; 94 95 apahb_gate: apahb-gate@0 { 96 compatible = "sprd,sc9863a-apahb-gate"; 97 reg = <0x0 0x1020>; 98 #clock-cells = <1>; 99 }; 100 }; 101 102... 103