1406171bfSSagar Kadam# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2406171bfSSagar Kadam# Copyright (C) 2020 SiFive, Inc. 3406171bfSSagar Kadam%YAML 1.2 4406171bfSSagar Kadam--- 5406171bfSSagar Kadam$id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml# 6406171bfSSagar Kadam$schema: http://devicetree.org/meta-schemas/core.yaml# 7406171bfSSagar Kadam 8406171bfSSagar Kadamtitle: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI) 9406171bfSSagar Kadam 10406171bfSSagar Kadammaintainers: 11406171bfSSagar Kadam - Paul Walmsley <paul.walmsley@sifive.com> 12406171bfSSagar Kadam 13406171bfSSagar Kadamdescription: 14406171bfSSagar Kadam On the FU540 family of SoCs, most system-wide clock and reset integration 15406171bfSSagar Kadam is via the PRCI IP block. 16406171bfSSagar Kadam The clock consumer should specify the desired clock via the clock ID 17406171bfSSagar Kadam macros defined in include/dt-bindings/clock/sifive-fu540-prci.h. 18406171bfSSagar Kadam These macros begin with PRCI_CLK_. 19406171bfSSagar Kadam 20406171bfSSagar Kadam The hfclk and rtcclk nodes are required, and represent physical 21406171bfSSagar Kadam crystals or resonators located on the PCB. These nodes should be present 22406171bfSSagar Kadam underneath /, rather than /soc. 23406171bfSSagar Kadam 24406171bfSSagar Kadamproperties: 25406171bfSSagar Kadam compatible: 26406171bfSSagar Kadam const: sifive,fu540-c000-prci 27406171bfSSagar Kadam 28406171bfSSagar Kadam reg: 29406171bfSSagar Kadam maxItems: 1 30406171bfSSagar Kadam 31406171bfSSagar Kadam clocks: 32406171bfSSagar Kadam items: 33406171bfSSagar Kadam - description: high frequency clock. 34406171bfSSagar Kadam - description: RTL clock. 35406171bfSSagar Kadam 36406171bfSSagar Kadam clock-names: 37406171bfSSagar Kadam items: 38406171bfSSagar Kadam - const: hfclk 39406171bfSSagar Kadam - const: rtcclk 40406171bfSSagar Kadam 41406171bfSSagar Kadam "#clock-cells": 42406171bfSSagar Kadam const: 1 43406171bfSSagar Kadam 44406171bfSSagar Kadamrequired: 45406171bfSSagar Kadam - compatible 46406171bfSSagar Kadam - reg 47406171bfSSagar Kadam - clocks 48406171bfSSagar Kadam - "#clock-cells" 49406171bfSSagar Kadam 50406171bfSSagar KadamadditionalProperties: false 51406171bfSSagar Kadam 52406171bfSSagar Kadamexamples: 53406171bfSSagar Kadam - | 54406171bfSSagar Kadam prci: clock-controller@10000000 { 55406171bfSSagar Kadam compatible = "sifive,fu540-c000-prci"; 56406171bfSSagar Kadam reg = <0x10000000 0x1000>; 57406171bfSSagar Kadam clocks = <&hfclk>, <&rtcclk>; 58406171bfSSagar Kadam #clock-cells = <1>; 59406171bfSSagar Kadam }; 60