1406171bfSSagar Kadam# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2406171bfSSagar Kadam# Copyright (C) 2020 SiFive, Inc. 3406171bfSSagar Kadam%YAML 1.2 4406171bfSSagar Kadam--- 5406171bfSSagar Kadam$id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml# 6406171bfSSagar Kadam$schema: http://devicetree.org/meta-schemas/core.yaml# 7406171bfSSagar Kadam 8406171bfSSagar Kadamtitle: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI) 9406171bfSSagar Kadam 10406171bfSSagar Kadammaintainers: 11406171bfSSagar Kadam - Sagar Kadam <sagar.kadam@sifive.com> 12406171bfSSagar Kadam - Paul Walmsley <paul.walmsley@sifive.com> 13406171bfSSagar Kadam 14406171bfSSagar Kadamdescription: 15406171bfSSagar Kadam On the FU540 family of SoCs, most system-wide clock and reset integration 16406171bfSSagar Kadam is via the PRCI IP block. 17406171bfSSagar Kadam The clock consumer should specify the desired clock via the clock ID 18406171bfSSagar Kadam macros defined in include/dt-bindings/clock/sifive-fu540-prci.h. 19406171bfSSagar Kadam These macros begin with PRCI_CLK_. 20406171bfSSagar Kadam 21406171bfSSagar Kadam The hfclk and rtcclk nodes are required, and represent physical 22406171bfSSagar Kadam crystals or resonators located on the PCB. These nodes should be present 23406171bfSSagar Kadam underneath /, rather than /soc. 24406171bfSSagar Kadam 25406171bfSSagar Kadamproperties: 26406171bfSSagar Kadam compatible: 27406171bfSSagar Kadam const: sifive,fu540-c000-prci 28406171bfSSagar Kadam 29406171bfSSagar Kadam reg: 30406171bfSSagar Kadam maxItems: 1 31406171bfSSagar Kadam 32406171bfSSagar Kadam clocks: 33406171bfSSagar Kadam items: 34406171bfSSagar Kadam - description: high frequency clock. 35406171bfSSagar Kadam - description: RTL clock. 36406171bfSSagar Kadam 37406171bfSSagar Kadam clock-names: 38406171bfSSagar Kadam items: 39406171bfSSagar Kadam - const: hfclk 40406171bfSSagar Kadam - const: rtcclk 41406171bfSSagar Kadam 42406171bfSSagar Kadam "#clock-cells": 43406171bfSSagar Kadam const: 1 44406171bfSSagar Kadam 45406171bfSSagar Kadamrequired: 46406171bfSSagar Kadam - compatible 47406171bfSSagar Kadam - reg 48406171bfSSagar Kadam - clocks 49406171bfSSagar Kadam - "#clock-cells" 50406171bfSSagar Kadam 51406171bfSSagar KadamadditionalProperties: false 52406171bfSSagar Kadam 53406171bfSSagar Kadamexamples: 54406171bfSSagar Kadam - | 55406171bfSSagar Kadam prci: clock-controller@10000000 { 56406171bfSSagar Kadam compatible = "sifive,fu540-c000-prci"; 57406171bfSSagar Kadam reg = <0x10000000 0x1000>; 58406171bfSSagar Kadam clocks = <&hfclk>, <&rtcclk>; 59406171bfSSagar Kadam #clock-cells = <1>; 60406171bfSSagar Kadam }; 61