1# SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip RV1108 Clock and Reset Unit (CRU) 8 9maintainers: 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 12 13description: | 14 The RV1108 clock controller generates and supplies clocks to various 15 controllers within the SoC and also implements a reset controller for SoC 16 peripherals. 17 Each clock is assigned an identifier and client nodes can use this identifier 18 to specify the clock which they consume. All available clocks are defined as 19 preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be 20 used in device tree sources. Similar macros exist for the reset sources in 21 these files. 22 There are several clocks that are generated outside the SoC. It is expected 23 that they are defined using standard clock bindings with following 24 clock-output-names: 25 - "xin24m" - crystal input - required 26 - "ext_vip" - external VIP clock - optional 27 - "ext_i2s" - external I2S clock - optional 28 - "ext_gmac" - external GMAC clock - optional 29 - "hdmiphy" - external clock input derived from HDMI PHY - optional 30 - "usbphy" - external clock input derived from USB PHY - optional 31 32properties: 33 compatible: 34 enum: 35 - rockchip,rv1108-cru 36 37 reg: 38 maxItems: 1 39 40 "#clock-cells": 41 const: 1 42 43 "#reset-cells": 44 const: 1 45 46 clocks: 47 maxItems: 1 48 49 clock-names: 50 const: xin24m 51 52 rockchip,grf: 53 $ref: /schemas/types.yaml#/definitions/phandle 54 description: 55 Phandle to the syscon managing the "general register files" (GRF), 56 if missing pll rates are not changeable, due to the missing pll 57 lock status. 58 59required: 60 - compatible 61 - reg 62 - "#clock-cells" 63 - "#reset-cells" 64 65additionalProperties: false 66 67examples: 68 - | 69 cru: clock-controller@20200000 { 70 compatible = "rockchip,rv1108-cru"; 71 reg = <0x20200000 0x1000>; 72 rockchip,grf = <&grf>; 73 #clock-cells = <1>; 74 #reset-cells = <1>; 75 }; 76