1*fffa0fa4SJohan Jonker# SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2d87642d7SJohan Jonker%YAML 1.2 3d87642d7SJohan Jonker--- 4d87642d7SJohan Jonker$id: http://devicetree.org/schemas/clock/rockchip,rk3308-cru.yaml# 5d87642d7SJohan Jonker$schema: http://devicetree.org/meta-schemas/core.yaml# 6d87642d7SJohan Jonker 7d87642d7SJohan Jonkertitle: Rockchip RK3308 Clock and Reset Unit (CRU) 8d87642d7SJohan Jonker 9d87642d7SJohan Jonkermaintainers: 10d87642d7SJohan Jonker - Elaine Zhang <zhangqing@rock-chips.com> 11d87642d7SJohan Jonker - Heiko Stuebner <heiko@sntech.de> 12d87642d7SJohan Jonker 13d87642d7SJohan Jonkerdescription: | 14d87642d7SJohan Jonker The RK3308 clock controller generates and supplies clocks to various 15d87642d7SJohan Jonker controllers within the SoC and also implements a reset controller for SoC 16d87642d7SJohan Jonker peripherals. 17d87642d7SJohan Jonker Each clock is assigned an identifier and client nodes can use this identifier 18d87642d7SJohan Jonker to specify the clock which they consume. All available clocks are defined as 19d87642d7SJohan Jonker preprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be 20d87642d7SJohan Jonker used in device tree sources. Similar macros exist for the reset sources in 21d87642d7SJohan Jonker these files. 22d87642d7SJohan Jonker There are several clocks that are generated outside the SoC. It is expected 23d87642d7SJohan Jonker that they are defined using standard clock bindings with following 24d87642d7SJohan Jonker clock-output-names: 25d87642d7SJohan Jonker - "xin24m" - crystal input - required 26d87642d7SJohan Jonker - "xin32k" - rtc clock - optional 27d87642d7SJohan Jonker - "mclk_i2s0_8ch_in", "mclk_i2s1_8ch_in", 28d87642d7SJohan Jonker "mclk_i2s2_8ch_in", "mclk_i2s3_8ch_in", 29d87642d7SJohan Jonker "mclk_i2s0_2ch_in", "mclk_i2s1_2ch_in" - external I2S or 30d87642d7SJohan Jonker SPDIF clock - optional 31d87642d7SJohan Jonker - "mac_clkin" - external MAC clock - optional 32d87642d7SJohan Jonker 33d87642d7SJohan Jonkerproperties: 34d87642d7SJohan Jonker compatible: 35d87642d7SJohan Jonker enum: 36d87642d7SJohan Jonker - rockchip,rk3308-cru 37d87642d7SJohan Jonker 38d87642d7SJohan Jonker reg: 39d87642d7SJohan Jonker maxItems: 1 40d87642d7SJohan Jonker 41d87642d7SJohan Jonker "#clock-cells": 42d87642d7SJohan Jonker const: 1 43d87642d7SJohan Jonker 44d87642d7SJohan Jonker "#reset-cells": 45d87642d7SJohan Jonker const: 1 46d87642d7SJohan Jonker 47d87642d7SJohan Jonker clocks: 48d87642d7SJohan Jonker maxItems: 1 49d87642d7SJohan Jonker 50d87642d7SJohan Jonker clock-names: 51d87642d7SJohan Jonker const: xin24m 52d87642d7SJohan Jonker 53d87642d7SJohan Jonker rockchip,grf: 54d87642d7SJohan Jonker $ref: /schemas/types.yaml#/definitions/phandle 55d87642d7SJohan Jonker description: 56d87642d7SJohan Jonker Phandle to the syscon managing the "general register files" (GRF), 57d87642d7SJohan Jonker if missing pll rates are not changeable, due to the missing pll 58d87642d7SJohan Jonker lock status. 59d87642d7SJohan Jonker 60d87642d7SJohan Jonkerrequired: 61d87642d7SJohan Jonker - compatible 62d87642d7SJohan Jonker - reg 63d87642d7SJohan Jonker - "#clock-cells" 64d87642d7SJohan Jonker - "#reset-cells" 65d87642d7SJohan Jonker 66d87642d7SJohan JonkeradditionalProperties: false 67d87642d7SJohan Jonker 68d87642d7SJohan Jonkerexamples: 69d87642d7SJohan Jonker - | 70d87642d7SJohan Jonker cru: clock-controller@ff500000 { 71d87642d7SJohan Jonker compatible = "rockchip,rk3308-cru"; 72d87642d7SJohan Jonker reg = <0xff500000 0x1000>; 73d87642d7SJohan Jonker rockchip,grf = <&grf>; 74d87642d7SJohan Jonker #clock-cells = <1>; 75d87642d7SJohan Jonker #reset-cells = <1>; 76d87642d7SJohan Jonker }; 77