193a17c05STang Yuantian* Clock Block on Freescale QorIQ Platforms 2eaf76b21STang Yuantian 30dfc86b3SScott WoodFreescale QorIQ chips take primary clocking input from the external 4eaf76b21STang YuantianSYSCLK signal. The SYSCLK input (frequency) is multiplied using 5eaf76b21STang Yuantianmultiple phase locked loops (PLL) to create a variety of frequencies 6eaf76b21STang Yuantianwhich can then be passed to a variety of internal logic, including 7eaf76b21STang Yuantiancores and peripheral IP blocks. 8eaf76b21STang YuantianPlease refer to the Reference Manual for details. 9eaf76b21STang Yuantian 10eaf76b21STang YuantianAll references to "1.0" and "2.0" refer to the QorIQ chassis version to 11eaf76b21STang Yuantianwhich the chip complies. 12eaf76b21STang Yuantian 13eaf76b21STang YuantianChassis Version Example Chips 14eaf76b21STang Yuantian--------------- ------------- 15eaf76b21STang Yuantian1.0 p4080, p5020, p5040 160dfc86b3SScott Wood2.0 t4240, b4860 17eaf76b21STang Yuantian 18eaf76b21STang Yuantian1. Clock Block Binding 19eaf76b21STang Yuantian 20eaf76b21STang YuantianRequired properties: 210dfc86b3SScott Wood- compatible: Should contain a chip-specific clock block compatible 220dfc86b3SScott Wood string and (if applicable) may contain a chassis-version clock 230dfc86b3SScott Wood compatible string. 240dfc86b3SScott Wood 250dfc86b3SScott Wood Chip-specific strings are of the form "fsl,<chip>-clockgen", such as: 26eaf76b21STang Yuantian * "fsl,p2041-clockgen" 27eaf76b21STang Yuantian * "fsl,p3041-clockgen" 28eaf76b21STang Yuantian * "fsl,p4080-clockgen" 29eaf76b21STang Yuantian * "fsl,p5020-clockgen" 30eaf76b21STang Yuantian * "fsl,p5040-clockgen" 31eaf76b21STang Yuantian * "fsl,t4240-clockgen" 32eaf76b21STang Yuantian * "fsl,b4420-clockgen" 33eaf76b21STang Yuantian * "fsl,b4860-clockgen" 3493a17c05STang Yuantian * "fsl,ls1021a-clockgen" 352b688d5bSShaohui Xie * "fsl,ls1043a-clockgen" 362b688d5bSShaohui Xie * "fsl,ls1046a-clockgen" 372b688d5bSShaohui Xie * "fsl,ls2080a-clockgen" 380dfc86b3SScott Wood Chassis-version clock strings include: 39eaf76b21STang Yuantian * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks 40eaf76b21STang Yuantian * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks 41eaf76b21STang Yuantian- reg: Describes the address of the device's resources within the 42eaf76b21STang Yuantian address space defined by its parent bus, and resource zero 43eaf76b21STang Yuantian represents the clock register set 44eaf76b21STang Yuantian 450dfc86b3SScott WoodOptional properties: 46eaf76b21STang Yuantian- ranges: Allows valid translation between child's address space and 47eaf76b21STang Yuantian parent's. Must be present if the device has sub-nodes. 48eaf76b21STang Yuantian- #address-cells: Specifies the number of cells used to represent 49eaf76b21STang Yuantian physical base addresses. Must be present if the device has 50eaf76b21STang Yuantian sub-nodes and set to 1 if present 51eaf76b21STang Yuantian- #size-cells: Specifies the number of cells used to represent 52eaf76b21STang Yuantian the size of an address. Must be present if the device has 53eaf76b21STang Yuantian sub-nodes and set to 1 if present 540dfc86b3SScott Wood- clock-frequency: Input system clock frequency (SYSCLK) 550dfc86b3SScott Wood- clocks: If clock-frequency is not specified, sysclk may be provided 560dfc86b3SScott Wood as an input clock. Either clock-frequency or clocks must be 570dfc86b3SScott Wood provided. 58eaf76b21STang Yuantian 590dfc86b3SScott Wood2. Clock Provider 600dfc86b3SScott Wood 610dfc86b3SScott WoodThe clockgen node should act as a clock provider, though in older device 620dfc86b3SScott Woodtrees the children of the clockgen node are the clock providers. 630dfc86b3SScott Wood 640dfc86b3SScott WoodWhen the clockgen node is a clock provider, #clock-cells = <2>. 650dfc86b3SScott WoodThe first cell of the clock specifier is the clock type, and the 660dfc86b3SScott Woodsecond cell is the clock index for the specified type. 670dfc86b3SScott Wood 680dfc86b3SScott Wood Type# Name Index Cell 690dfc86b3SScott Wood 0 sysclk must be 0 700dfc86b3SScott Wood 1 cmux index (n in CLKCnCSR) 710dfc86b3SScott Wood 2 hwaccel index (n in CLKCGnHWACSR) 720dfc86b3SScott Wood 3 fman 0 for fm1, 1 for fm2 730dfc86b3SScott Wood 4 platform pll 0=pll, 1=pll/2, 2=pll/3, 3=pll/4 740dfc86b3SScott Wood 750dfc86b3SScott Wood3. Example 760dfc86b3SScott Wood 770dfc86b3SScott Wood clockgen: global-utilities@e1000 { 780dfc86b3SScott Wood compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; 790dfc86b3SScott Wood clock-frequency = <133333333>; 800dfc86b3SScott Wood reg = <0xe1000 0x1000>; 810dfc86b3SScott Wood #clock-cells = <2>; 820dfc86b3SScott Wood }; 830dfc86b3SScott Wood 840dfc86b3SScott Wood fman@400000 { 850dfc86b3SScott Wood ... 860dfc86b3SScott Wood clocks = <&clockgen 3 0>; 870dfc86b3SScott Wood ... 880dfc86b3SScott Wood }; 890dfc86b3SScott Wood} 900dfc86b3SScott Wood4. Legacy Child Nodes 910dfc86b3SScott Wood 920dfc86b3SScott WoodNOTE: These nodes are deprecated. Kernels should continue to support 930dfc86b3SScott Wooddevice trees with these nodes, but new device trees should not use them. 94eaf76b21STang Yuantian 95eaf76b21STang YuantianMost of the bindings are from the common clock binding[1]. 96eaf76b21STang Yuantian [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 97eaf76b21STang Yuantian 98eaf76b21STang YuantianRequired properties: 99eaf76b21STang Yuantian- compatible : Should include one of the following: 100eaf76b21STang Yuantian * "fsl,qoriq-core-pll-1.0" for core PLL clocks (v1.0) 101eaf76b21STang Yuantian * "fsl,qoriq-core-pll-2.0" for core PLL clocks (v2.0) 102eaf76b21STang Yuantian * "fsl,qoriq-core-mux-1.0" for core mux clocks (v1.0) 103eaf76b21STang Yuantian * "fsl,qoriq-core-mux-2.0" for core mux clocks (v2.0) 104eaf76b21STang Yuantian * "fsl,qoriq-sysclk-1.0": for input system clock (v1.0). 105eaf76b21STang Yuantian It takes parent's clock-frequency as its clock. 106eaf76b21STang Yuantian * "fsl,qoriq-sysclk-2.0": for input system clock (v2.0). 107eaf76b21STang Yuantian It takes parent's clock-frequency as its clock. 108f1aa77c9SEmil Medve * "fsl,qoriq-platform-pll-1.0" for the platform PLL clock (v1.0) 109f1aa77c9SEmil Medve * "fsl,qoriq-platform-pll-2.0" for the platform PLL clock (v2.0) 110eaf76b21STang Yuantian- #clock-cells: From common clock binding. The number of cells in a 111eaf76b21STang Yuantian clock-specifier. Should be <0> for "fsl,qoriq-sysclk-[1,2].0" 112eaf76b21STang Yuantian clocks, or <1> for "fsl,qoriq-core-pll-[1,2].0" clocks. 113eaf76b21STang Yuantian For "fsl,qoriq-core-pll-[1,2].0" clocks, the single 114eaf76b21STang Yuantian clock-specifier cell may take the following values: 115eaf76b21STang Yuantian * 0 - equal to the PLL frequency 116eaf76b21STang Yuantian * 1 - equal to the PLL frequency divided by 2 117eaf76b21STang Yuantian * 2 - equal to the PLL frequency divided by 4 118eaf76b21STang Yuantian 119eaf76b21STang YuantianRecommended properties: 120eaf76b21STang Yuantian- clocks: Should be the phandle of input parent clock 121eaf76b21STang Yuantian- clock-names: From common clock binding, indicates the clock name 122eaf76b21STang Yuantian- clock-output-names: From common clock binding, indicates the names of 123eaf76b21STang Yuantian output clocks 124eaf76b21STang Yuantian- reg: Should be the offset and length of clock block base address. 125eaf76b21STang Yuantian The length should be 4. 126eaf76b21STang Yuantian 1270dfc86b3SScott WoodLegacy Example: 128eaf76b21STang Yuantian/ { 129eaf76b21STang Yuantian clockgen: global-utilities@e1000 { 130eaf76b21STang Yuantian compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0"; 131eaf76b21STang Yuantian ranges = <0x0 0xe1000 0x1000>; 132eaf76b21STang Yuantian clock-frequency = <133333333>; 133eaf76b21STang Yuantian reg = <0xe1000 0x1000>; 134eaf76b21STang Yuantian #address-cells = <1>; 135eaf76b21STang Yuantian #size-cells = <1>; 136eaf76b21STang Yuantian 137eaf76b21STang Yuantian sysclk: sysclk { 138eaf76b21STang Yuantian #clock-cells = <0>; 139eaf76b21STang Yuantian compatible = "fsl,qoriq-sysclk-1.0"; 140eaf76b21STang Yuantian clock-output-names = "sysclk"; 141eaf76b21STang Yuantian }; 142eaf76b21STang Yuantian 143eaf76b21STang Yuantian pll0: pll0@800 { 144eaf76b21STang Yuantian #clock-cells = <1>; 145eaf76b21STang Yuantian reg = <0x800 0x4>; 146eaf76b21STang Yuantian compatible = "fsl,qoriq-core-pll-1.0"; 147eaf76b21STang Yuantian clocks = <&sysclk>; 148eaf76b21STang Yuantian clock-output-names = "pll0", "pll0-div2"; 149eaf76b21STang Yuantian }; 150eaf76b21STang Yuantian 151eaf76b21STang Yuantian pll1: pll1@820 { 152eaf76b21STang Yuantian #clock-cells = <1>; 153eaf76b21STang Yuantian reg = <0x820 0x4>; 154eaf76b21STang Yuantian compatible = "fsl,qoriq-core-pll-1.0"; 155eaf76b21STang Yuantian clocks = <&sysclk>; 156eaf76b21STang Yuantian clock-output-names = "pll1", "pll1-div2"; 157eaf76b21STang Yuantian }; 158eaf76b21STang Yuantian 159eaf76b21STang Yuantian mux0: mux0@0 { 160eaf76b21STang Yuantian #clock-cells = <0>; 161eaf76b21STang Yuantian reg = <0x0 0x4>; 162eaf76b21STang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 163eaf76b21STang Yuantian clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 164eaf76b21STang Yuantian clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 165eaf76b21STang Yuantian clock-output-names = "cmux0"; 166eaf76b21STang Yuantian }; 167eaf76b21STang Yuantian 168eaf76b21STang Yuantian mux1: mux1@20 { 169eaf76b21STang Yuantian #clock-cells = <0>; 170eaf76b21STang Yuantian reg = <0x20 0x4>; 171eaf76b21STang Yuantian compatible = "fsl,qoriq-core-mux-1.0"; 172eaf76b21STang Yuantian clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>; 173eaf76b21STang Yuantian clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2"; 174eaf76b21STang Yuantian clock-output-names = "cmux1"; 175eaf76b21STang Yuantian }; 176f1aa77c9SEmil Medve 177f1aa77c9SEmil Medve platform-pll: platform-pll@c00 { 178f1aa77c9SEmil Medve #clock-cells = <1>; 179f1aa77c9SEmil Medve reg = <0xc00 0x4>; 180f1aa77c9SEmil Medve compatible = "fsl,qoriq-platform-pll-1.0"; 181f1aa77c9SEmil Medve clocks = <&sysclk>; 182f1aa77c9SEmil Medve clock-output-names = "platform-pll", "platform-pll-div2"; 183eaf76b21STang Yuantian }; 184f1aa77c9SEmil Medve }; 185f1aa77c9SEmil Medve}; 186eaf76b21STang Yuantian 1870dfc86b3SScott WoodExample for legacy clock consumer: 188eaf76b21STang Yuantian 189eaf76b21STang Yuantian/ { 190eaf76b21STang Yuantian cpu0: PowerPC,e5500@0 { 191eaf76b21STang Yuantian ... 192eaf76b21STang Yuantian clocks = <&mux0>; 193eaf76b21STang Yuantian ... 194eaf76b21STang Yuantian }; 195f1aa77c9SEmil Medve}; 196