11e910b2bSTaniya Das# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
21e910b2bSTaniya Das%YAML 1.2
31e910b2bSTaniya Das---
41e910b2bSTaniya Das$id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml#
51e910b2bSTaniya Das$schema: http://devicetree.org/meta-schemas/core.yaml#
61e910b2bSTaniya Das
71e910b2bSTaniya Dastitle: Qualcomm Video Clock & Reset Controller on SM8450
81e910b2bSTaniya Das
91e910b2bSTaniya Dasmaintainers:
101e910b2bSTaniya Das  - Taniya Das <quic_tdas@quicinc.com>
111e910b2bSTaniya Das
121e910b2bSTaniya Dasdescription: |
131e910b2bSTaniya Das  Qualcomm video clock control module provides the clocks, resets and power
141e910b2bSTaniya Das  domains on SM8450.
151e910b2bSTaniya Das
161e910b2bSTaniya Das  See also:: include/dt-bindings/clock/qcom,videocc-sm8450.h
171e910b2bSTaniya Das
181e910b2bSTaniya Dasproperties:
191e910b2bSTaniya Das  compatible:
20c7d91f26SJagadeesh Kona    enum:
21c7d91f26SJagadeesh Kona      - qcom,sm8450-videocc
22c7d91f26SJagadeesh Kona      - qcom,sm8550-videocc
231e910b2bSTaniya Das
241e910b2bSTaniya Das  reg:
251e910b2bSTaniya Das    maxItems: 1
261e910b2bSTaniya Das
271e910b2bSTaniya Das  clocks:
281e910b2bSTaniya Das    items:
291e910b2bSTaniya Das      - description: Board XO source
301e910b2bSTaniya Das      - description: Video AHB clock from GCC
311e910b2bSTaniya Das
321e910b2bSTaniya Das  power-domains:
331e910b2bSTaniya Das    maxItems: 1
341e910b2bSTaniya Das    description:
351e910b2bSTaniya Das      MMCX power domain.
361e910b2bSTaniya Das
371e910b2bSTaniya Das  required-opps:
381e910b2bSTaniya Das    maxItems: 1
391e910b2bSTaniya Das    description:
401e910b2bSTaniya Das      A phandle to an OPP node describing required MMCX performance point.
411e910b2bSTaniya Das
421e910b2bSTaniya Das  '#clock-cells':
431e910b2bSTaniya Das    const: 1
441e910b2bSTaniya Das
451e910b2bSTaniya Das  '#reset-cells':
461e910b2bSTaniya Das    const: 1
471e910b2bSTaniya Das
481e910b2bSTaniya Das  '#power-domain-cells':
491e910b2bSTaniya Das    const: 1
501e910b2bSTaniya Das
511e910b2bSTaniya Dasrequired:
521e910b2bSTaniya Das  - compatible
531e910b2bSTaniya Das  - reg
541e910b2bSTaniya Das  - clocks
551e910b2bSTaniya Das  - power-domains
561e910b2bSTaniya Das  - required-opps
571e910b2bSTaniya Das  - '#clock-cells'
581e910b2bSTaniya Das  - '#reset-cells'
591e910b2bSTaniya Das  - '#power-domain-cells'
601e910b2bSTaniya Das
611e910b2bSTaniya DasadditionalProperties: false
621e910b2bSTaniya Das
631e910b2bSTaniya Dasexamples:
641e910b2bSTaniya Das  - |
651e910b2bSTaniya Das    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
661e910b2bSTaniya Das    #include <dt-bindings/clock/qcom,rpmh.h>
67*014f3272SRohit Agarwal    #include <dt-bindings/power/qcom,rpmhpd.h>
681e910b2bSTaniya Das    videocc: clock-controller@aaf0000 {
691e910b2bSTaniya Das      compatible = "qcom,sm8450-videocc";
701e910b2bSTaniya Das      reg = <0x0aaf0000 0x10000>;
711e910b2bSTaniya Das      clocks = <&rpmhcc RPMH_CXO_CLK>,
721e910b2bSTaniya Das               <&gcc GCC_VIDEO_AHB_CLK>;
73*014f3272SRohit Agarwal      power-domains = <&rpmhpd RPMHPD_MMCX>;
741e910b2bSTaniya Das      required-opps = <&rpmhpd_opp_low_svs>;
751e910b2bSTaniya Das      #clock-cells = <1>;
761e910b2bSTaniya Das      #reset-cells = <1>;
771e910b2bSTaniya Das      #power-domain-cells = <1>;
781e910b2bSTaniya Das    };
791e910b2bSTaniya Das...
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