1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Graphics Clock & Reset Controller on SM6375
8
9maintainers:
10  - Konrad Dybcio <konrad.dybcio@linaro.org>
11
12description: |
13  Qualcomm graphics clock control module provides clocks, resets and power
14  domains on Qualcomm SoCs.
15
16  See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h
17
18properties:
19  compatible:
20    enum:
21      - qcom,sm6375-gpucc
22
23  clocks:
24    items:
25      - description: Board XO source
26      - description: GPLL0 main branch source
27      - description: GPLL0 div branch source
28      - description: SNoC DVM GFX source
29
30required:
31  - compatible
32  - clocks
33
34allOf:
35  - $ref: qcom,gcc.yaml#
36
37unevaluatedProperties: false
38
39examples:
40  - |
41    #include <dt-bindings/clock/qcom,sm6375-gcc.h>
42    #include <dt-bindings/clock/qcom,rpmcc.h>
43
44    soc {
45        #address-cells = <2>;
46        #size-cells = <2>;
47
48        clock-controller@5990000 {
49            compatible = "qcom,sm6375-gpucc";
50            reg = <0 0x05990000 0 0x9000>;
51            clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
52                     <&gcc GCC_GPU_GPLL0_CLK_SRC>,
53                     <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>,
54                     <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>;
55            #clock-cells = <1>;
56            #reset-cells = <1>;
57            #power-domain-cells = <1>;
58        };
59    };
60...
61