xref: /openbmc/linux/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml (revision ac73d4bf2cdaf2cb8a43df8ee4a5c066d2c5d7b4) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm LPASS Core Clock Controller Binding for SC7280
8
9maintainers:
10  - Taniya Das <tdas@codeaurora.org>
11
12description: |
13  Qualcomm LPASS core clock control module which supports the clocks and
14  power domains on SC7280.
15
16  See also:
17  - dt-bindings/clock/qcom,lpass-sc7280.h
18
19properties:
20  compatible:
21    enum:
22      - qcom,sc7280-lpasscc
23
24  clocks:
25    items:
26      - description: gcc_cfg_noc_lpass_clk from GCC
27
28  clock-names:
29    items:
30      - const: iface
31
32  '#clock-cells':
33    const: 1
34
35  reg:
36    items:
37      - description: LPASS qdsp6ss register
38      - description: LPASS top-cc register
39
40  reg-names:
41    items:
42      - const: qdsp6ss
43      - const: top_cc
44
45required:
46  - compatible
47  - reg
48  - clocks
49  - clock-names
50  - '#clock-cells'
51
52additionalProperties: false
53
54examples:
55  - |
56    #include <dt-bindings/clock/qcom,gcc-sc7280.h>
57    #include <dt-bindings/clock/qcom,lpass-sc7280.h>
58    clock-controller@3000000 {
59      compatible = "qcom,sc7280-lpasscc";
60      reg = <0x03000000 0x40>, <0x03c04000 0x4>;
61      reg-names = "qdsp6ss", "top_cc";
62      clocks = <&gcc GCC_CFG_NOC_LPASS_CLK>;
63      clock-names = "iface";
64      #clock-cells = <1>;
65    };
66...
67