1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Multimedia Clock & Reset Controller Binding 8 9maintainers: 10 - Jeffrey Hugo <jhugo@codeaurora.org> 11 - Taniya Das <tdas@codeaurora.org> 12 13description: | 14 Qualcomm multimedia clock control module which supports the clocks, resets and 15 power domains. 16 17properties: 18 compatible: 19 enum: 20 - qcom,mmcc-apq8064 21 - qcom,mmcc-apq8084 22 - qcom,mmcc-msm8660 23 - qcom,mmcc-msm8960 24 - qcom,mmcc-msm8974 25 - qcom,mmcc-msm8992 26 - qcom,mmcc-msm8994 27 - qcom,mmcc-msm8996 28 - qcom,mmcc-msm8998 29 - qcom,mmcc-sdm630 30 - qcom,mmcc-sdm660 31 32 clocks: 33 items: 34 - description: Board XO source 35 - description: Board sleep source 36 - description: Global PLL 0 clock 37 - description: DSI phy instance 0 dsi clock 38 - description: DSI phy instance 0 byte clock 39 - description: DSI phy instance 1 dsi clock 40 - description: DSI phy instance 1 byte clock 41 - description: HDMI phy PLL clock 42 - description: DisplayPort phy PLL vco clock 43 - description: DisplayPort phy PLL link clock 44 45 clock-names: 46 items: 47 - const: xo 48 - const: sleep 49 - const: gpll0 50 - const: dsi0dsi 51 - const: dsi0byte 52 - const: dsi1dsi 53 - const: dsi1byte 54 - const: hdmipll 55 - const: dpvco 56 - const: dplink 57 58 '#clock-cells': 59 const: 1 60 61 '#reset-cells': 62 const: 1 63 64 '#power-domain-cells': 65 const: 1 66 67 reg: 68 maxItems: 1 69 70 protected-clocks: 71 description: 72 Protected clock specifier list as per common clock binding 73 74 vdd-gfx-supply: 75 description: 76 Regulator supply for the GPU_GX GDSC 77 78required: 79 - compatible 80 - reg 81 - '#clock-cells' 82 - '#reset-cells' 83 - '#power-domain-cells' 84 85additionalProperties: false 86 87if: 88 properties: 89 compatible: 90 contains: 91 const: qcom,mmcc-msm8998 92 93then: 94 required: 95 - clocks 96 - clock-names 97 98examples: 99 # Example for MMCC for MSM8960: 100 - | 101 clock-controller@4000000 { 102 compatible = "qcom,mmcc-msm8960"; 103 reg = <0x4000000 0x1000>; 104 #clock-cells = <1>; 105 #reset-cells = <1>; 106 #power-domain-cells = <1>; 107 }; 108... 109