1ca22cac2SDmitry Baryshkov# SPDX-License-Identifier: GPL-2.0-only 2ca22cac2SDmitry Baryshkov%YAML 1.2 3ca22cac2SDmitry Baryshkov--- 4ca22cac2SDmitry Baryshkov$id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml# 5ca22cac2SDmitry Baryshkov$schema: http://devicetree.org/meta-schemas/core.yaml# 6ca22cac2SDmitry Baryshkov 7ece3c319SKrzysztof Kozlowskititle: Qualcomm Global Clock & Reset Controller on SDM670 and SDM845 8ca22cac2SDmitry Baryshkov 9ca22cac2SDmitry Baryshkovmaintainers: 10ca22cac2SDmitry Baryshkov - Stephen Boyd <sboyd@kernel.org> 11*60838878STaniya Das - Taniya Das <quic_tdas@quicinc.com> 12ca22cac2SDmitry Baryshkov 13ca22cac2SDmitry Baryshkovdescription: | 14ece3c319SKrzysztof Kozlowski Qualcomm global clock control module provides the clocks, resets and power 15ece3c319SKrzysztof Kozlowski domains on SDM670 and SDM845 16ca22cac2SDmitry Baryshkov 17ece3c319SKrzysztof Kozlowski See also:: include/dt-bindings/clock/qcom,gcc-sdm845.h 18ca22cac2SDmitry Baryshkov 19ca22cac2SDmitry Baryshkovproperties: 20ca22cac2SDmitry Baryshkov compatible: 21657e9326SRichard Acayan enum: 22657e9326SRichard Acayan - qcom,gcc-sdm670 23657e9326SRichard Acayan - qcom,gcc-sdm845 24ca22cac2SDmitry Baryshkov 25ca22cac2SDmitry Baryshkov clocks: 26657e9326SRichard Acayan minItems: 3 27657e9326SRichard Acayan maxItems: 5 28ca22cac2SDmitry Baryshkov 29ca22cac2SDmitry Baryshkov clock-names: 30657e9326SRichard Acayan minItems: 3 31657e9326SRichard Acayan maxItems: 5 32ca22cac2SDmitry Baryshkov 33d62cac46SKrzysztof Kozlowski power-domains: 34d62cac46SKrzysztof Kozlowski maxItems: 1 35d62cac46SKrzysztof Kozlowski 36ca22cac2SDmitry Baryshkovrequired: 37ca22cac2SDmitry Baryshkov - compatible 38ca22cac2SDmitry Baryshkov 390f71ae94SDmitry BaryshkovallOf: 400f71ae94SDmitry Baryshkov - $ref: qcom,gcc.yaml# 41657e9326SRichard Acayan - if: 42657e9326SRichard Acayan properties: 43657e9326SRichard Acayan compatible: 44657e9326SRichard Acayan contains: 45657e9326SRichard Acayan const: qcom,gcc-sdm670 46657e9326SRichard Acayan then: 47657e9326SRichard Acayan properties: 48657e9326SRichard Acayan clocks: 49657e9326SRichard Acayan items: 50657e9326SRichard Acayan - description: Board XO source 51657e9326SRichard Acayan - description: Board active XO source 52657e9326SRichard Acayan - description: Sleep clock source 53657e9326SRichard Acayan clock-names: 54657e9326SRichard Acayan items: 55657e9326SRichard Acayan - const: bi_tcxo 56657e9326SRichard Acayan - const: bi_tcxo_ao 57657e9326SRichard Acayan - const: sleep_clk 58657e9326SRichard Acayan 59657e9326SRichard Acayan - if: 60657e9326SRichard Acayan properties: 61657e9326SRichard Acayan compatible: 62657e9326SRichard Acayan contains: 63657e9326SRichard Acayan const: qcom,gcc-sdm845 64657e9326SRichard Acayan then: 65657e9326SRichard Acayan properties: 66657e9326SRichard Acayan clocks: 67657e9326SRichard Acayan items: 68657e9326SRichard Acayan - description: Board XO source 69657e9326SRichard Acayan - description: Board active XO source 70657e9326SRichard Acayan - description: Sleep clock source 71657e9326SRichard Acayan - description: PCIE 0 Pipe clock source 72657e9326SRichard Acayan - description: PCIE 1 Pipe clock source 73657e9326SRichard Acayan clock-names: 74657e9326SRichard Acayan items: 75657e9326SRichard Acayan - const: bi_tcxo 76657e9326SRichard Acayan - const: bi_tcxo_ao 77657e9326SRichard Acayan - const: sleep_clk 78657e9326SRichard Acayan - const: pcie_0_pipe_clk 79657e9326SRichard Acayan - const: pcie_1_pipe_clk 800f71ae94SDmitry Baryshkov 810f71ae94SDmitry BaryshkovunevaluatedProperties: false 82ca22cac2SDmitry Baryshkov 83ca22cac2SDmitry Baryshkovexamples: 84ca22cac2SDmitry Baryshkov # Example for GCC for SDM845: 85ca22cac2SDmitry Baryshkov - | 86ca22cac2SDmitry Baryshkov #include <dt-bindings/clock/qcom,rpmh.h> 87ca22cac2SDmitry Baryshkov clock-controller@100000 { 88ca22cac2SDmitry Baryshkov compatible = "qcom,gcc-sdm845"; 89ca22cac2SDmitry Baryshkov reg = <0x100000 0x1f0000>; 90ca22cac2SDmitry Baryshkov clocks = <&rpmhcc RPMH_CXO_CLK>, 91ca22cac2SDmitry Baryshkov <&rpmhcc RPMH_CXO_CLK_A>, 92ca22cac2SDmitry Baryshkov <&sleep_clk>, 93ca22cac2SDmitry Baryshkov <&pcie0_lane>, 94ca22cac2SDmitry Baryshkov <&pcie1_lane>; 95ca22cac2SDmitry Baryshkov clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", "pcie_0_pipe_clk", "pcie_1_pipe_clk"; 96ca22cac2SDmitry Baryshkov #clock-cells = <1>; 97ca22cac2SDmitry Baryshkov #reset-cells = <1>; 98ca22cac2SDmitry Baryshkov #power-domain-cells = <1>; 99ca22cac2SDmitry Baryshkov }; 100ca22cac2SDmitry Baryshkov... 101