1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller Binding for MSM8998
8
9maintainers:
10  - Stephen Boyd <sboyd@kernel.org>
11  - Taniya Das <tdas@codeaurora.org>
12
13description: |
14  Qualcomm global clock control module which supports the clocks, resets and
15  power domains on MSM8998.
16
17  See also:
18  - dt-bindings/clock/qcom,gcc-msm8998.h
19
20properties:
21  compatible:
22    const: qcom,gcc-msm8998
23
24  clocks:
25    items:
26      - description: Board XO source
27      - description: Sleep clock source
28      - description: Audio reference clock (Optional clock)
29      - description: PLL test clock source (Optional clock)
30    minItems: 2
31
32  clock-names:
33    items:
34      - const: xo
35      - const: sleep_clk
36      - const: aud_ref_clk # Optional clock
37      - const: core_bi_pll_test_se # Optional clock
38    minItems: 2
39
40required:
41  - compatible
42  - clocks
43  - clock-names
44
45allOf:
46  - $ref: qcom,gcc.yaml#
47
48unevaluatedProperties: false
49
50examples:
51  - |
52    #include <dt-bindings/clock/qcom,rpmcc.h>
53    clock-controller@100000 {
54      compatible = "qcom,gcc-msm8998";
55      #clock-cells = <1>;
56      #reset-cells = <1>;
57      #power-domain-cells = <1>;
58      reg = <0x00100000 0xb0000>;
59      clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
60               <&sleep>,
61               <0>,
62               <0>;
63      clock-names = "xo",
64                    "sleep_clk",
65                    "aud_ref_clk",
66                    "core_bi_pll_test_se";
67    };
68...
69