1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8976.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Global Clock & Reset Controller Binding for MSM8976
8
9maintainers:
10  - Stephen Boyd <sboyd@kernel.org>
11  - Taniya Das <tdas@codeaurora.org>
12
13description: |
14  Qualcomm global clock control module which supports the clocks, resets and
15  power domains on MSM8976.
16
17  See also:
18  - dt-bindings/clock/qcom,gcc-msm8976.h
19
20properties:
21  compatible:
22    enum:
23      - qcom,gcc-msm8976
24      - qcom,gcc-msm8976-v1.1
25
26  clocks:
27    items:
28      - description: XO source
29      - description: Always-on XO source
30      - description: Pixel clock from DSI PHY0
31      - description: Byte clock from DSI PHY0
32      - description: Pixel clock from DSI PHY1
33      - description: Byte clock from DSI PHY1
34
35  clock-names:
36    items:
37      - const: xo
38      - const: xo_a
39      - const: dsi0pll
40      - const: dsi0pllbyte
41      - const: dsi1pll
42      - const: dsi1pllbyte
43
44  vdd_gfx-supply:
45    description:
46      Phandle to voltage regulator providing power to the GX domain.
47
48required:
49  - compatible
50  - clocks
51  - clock-names
52  - vdd_gfx-supply
53
54allOf:
55  - $ref: qcom,gcc.yaml#
56
57unevaluatedProperties: false
58
59examples:
60  - |
61    clock-controller@1800000 {
62      compatible = "qcom,gcc-msm8976";
63      #clock-cells = <1>;
64      #reset-cells = <1>;
65      #power-domain-cells = <1>;
66      reg = <0x1800000 0x80000>;
67
68      clocks = <&xo_board>,
69               <&xo_board>,
70               <&dsi0_phy 1>,
71               <&dsi0_phy 0>,
72               <&dsi1_phy 1>,
73               <&dsi1_phy 0>;
74
75      clock-names = "xo",
76                    "xo_a",
77                    "dsi0pll",
78                    "dsi0pllbyte",
79                    "dsi1pll",
80                    "dsi1pllbyte";
81
82      vdd_gfx-supply = <&pm8004_s5>;
83    };
84...
85