1*d220193cSAbel Vesa# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*d220193cSAbel Vesa%YAML 1.2 3*d220193cSAbel Vesa--- 4*d220193cSAbel Vesa$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml# 5*d220193cSAbel Vesa$schema: http://devicetree.org/meta-schemas/core.yaml# 6*d220193cSAbel Vesa 7*d220193cSAbel Vesatitle: Qualcomm TCSR Clock Controller on SM8550 8*d220193cSAbel Vesa 9*d220193cSAbel Vesamaintainers: 10*d220193cSAbel Vesa - Bjorn Andersson <andersson@kernel.org> 11*d220193cSAbel Vesa 12*d220193cSAbel Vesadescription: | 13*d220193cSAbel Vesa Qualcomm TCSR clock control module provides the clocks, resets and 14*d220193cSAbel Vesa power domains on SM8550 15*d220193cSAbel Vesa 16*d220193cSAbel Vesa See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h 17*d220193cSAbel Vesa 18*d220193cSAbel Vesaproperties: 19*d220193cSAbel Vesa compatible: 20*d220193cSAbel Vesa items: 21*d220193cSAbel Vesa - const: qcom,sm8550-tcsr 22*d220193cSAbel Vesa - const: syscon 23*d220193cSAbel Vesa 24*d220193cSAbel Vesa clocks: 25*d220193cSAbel Vesa items: 26*d220193cSAbel Vesa - description: TCXO pad clock 27*d220193cSAbel Vesa 28*d220193cSAbel Vesa reg: 29*d220193cSAbel Vesa maxItems: 1 30*d220193cSAbel Vesa 31*d220193cSAbel Vesa '#clock-cells': 32*d220193cSAbel Vesa const: 1 33*d220193cSAbel Vesa 34*d220193cSAbel Vesa '#reset-cells': 35*d220193cSAbel Vesa const: 1 36*d220193cSAbel Vesa 37*d220193cSAbel Vesarequired: 38*d220193cSAbel Vesa - compatible 39*d220193cSAbel Vesa - clocks 40*d220193cSAbel Vesa 41*d220193cSAbel VesaadditionalProperties: false 42*d220193cSAbel Vesa 43*d220193cSAbel Vesaexamples: 44*d220193cSAbel Vesa - | 45*d220193cSAbel Vesa #include <dt-bindings/clock/qcom,rpmh.h> 46*d220193cSAbel Vesa 47*d220193cSAbel Vesa clock-controller@1fc0000 { 48*d220193cSAbel Vesa compatible = "qcom,sm8550-tcsr", "syscon"; 49*d220193cSAbel Vesa reg = <0x1fc0000 0x30000>; 50*d220193cSAbel Vesa clocks = <&rpmhcc RPMH_CXO_CLK>; 51*d220193cSAbel Vesa #clock-cells = <1>; 52*d220193cSAbel Vesa #reset-cells = <1>; 53*d220193cSAbel Vesa }; 54*d220193cSAbel Vesa 55*d220193cSAbel Vesa... 56