1*1e910b2bSTaniya Das# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*1e910b2bSTaniya Das%YAML 1.2 3*1e910b2bSTaniya Das--- 4*1e910b2bSTaniya Das$id: http://devicetree.org/schemas/clock/qcom,sm8450-videocc.yaml# 5*1e910b2bSTaniya Das$schema: http://devicetree.org/meta-schemas/core.yaml# 6*1e910b2bSTaniya Das 7*1e910b2bSTaniya Dastitle: Qualcomm Video Clock & Reset Controller on SM8450 8*1e910b2bSTaniya Das 9*1e910b2bSTaniya Dasmaintainers: 10*1e910b2bSTaniya Das - Taniya Das <quic_tdas@quicinc.com> 11*1e910b2bSTaniya Das 12*1e910b2bSTaniya Dasdescription: | 13*1e910b2bSTaniya Das Qualcomm video clock control module provides the clocks, resets and power 14*1e910b2bSTaniya Das domains on SM8450. 15*1e910b2bSTaniya Das 16*1e910b2bSTaniya Das See also:: include/dt-bindings/clock/qcom,videocc-sm8450.h 17*1e910b2bSTaniya Das 18*1e910b2bSTaniya Dasproperties: 19*1e910b2bSTaniya Das compatible: 20*1e910b2bSTaniya Das const: qcom,sm8450-videocc 21*1e910b2bSTaniya Das 22*1e910b2bSTaniya Das reg: 23*1e910b2bSTaniya Das maxItems: 1 24*1e910b2bSTaniya Das 25*1e910b2bSTaniya Das clocks: 26*1e910b2bSTaniya Das items: 27*1e910b2bSTaniya Das - description: Board XO source 28*1e910b2bSTaniya Das - description: Video AHB clock from GCC 29*1e910b2bSTaniya Das 30*1e910b2bSTaniya Das power-domains: 31*1e910b2bSTaniya Das maxItems: 1 32*1e910b2bSTaniya Das description: 33*1e910b2bSTaniya Das MMCX power domain. 34*1e910b2bSTaniya Das 35*1e910b2bSTaniya Das required-opps: 36*1e910b2bSTaniya Das maxItems: 1 37*1e910b2bSTaniya Das description: 38*1e910b2bSTaniya Das A phandle to an OPP node describing required MMCX performance point. 39*1e910b2bSTaniya Das 40*1e910b2bSTaniya Das '#clock-cells': 41*1e910b2bSTaniya Das const: 1 42*1e910b2bSTaniya Das 43*1e910b2bSTaniya Das '#reset-cells': 44*1e910b2bSTaniya Das const: 1 45*1e910b2bSTaniya Das 46*1e910b2bSTaniya Das '#power-domain-cells': 47*1e910b2bSTaniya Das const: 1 48*1e910b2bSTaniya Das 49*1e910b2bSTaniya Dasrequired: 50*1e910b2bSTaniya Das - compatible 51*1e910b2bSTaniya Das - reg 52*1e910b2bSTaniya Das - clocks 53*1e910b2bSTaniya Das - power-domains 54*1e910b2bSTaniya Das - required-opps 55*1e910b2bSTaniya Das - '#clock-cells' 56*1e910b2bSTaniya Das - '#reset-cells' 57*1e910b2bSTaniya Das - '#power-domain-cells' 58*1e910b2bSTaniya Das 59*1e910b2bSTaniya DasadditionalProperties: false 60*1e910b2bSTaniya Das 61*1e910b2bSTaniya Dasexamples: 62*1e910b2bSTaniya Das - | 63*1e910b2bSTaniya Das #include <dt-bindings/clock/qcom,gcc-sm8450.h> 64*1e910b2bSTaniya Das #include <dt-bindings/clock/qcom,rpmh.h> 65*1e910b2bSTaniya Das #include <dt-bindings/power/qcom-rpmpd.h> 66*1e910b2bSTaniya Das videocc: clock-controller@aaf0000 { 67*1e910b2bSTaniya Das compatible = "qcom,sm8450-videocc"; 68*1e910b2bSTaniya Das reg = <0x0aaf0000 0x10000>; 69*1e910b2bSTaniya Das clocks = <&rpmhcc RPMH_CXO_CLK>, 70*1e910b2bSTaniya Das <&gcc GCC_VIDEO_AHB_CLK>; 71*1e910b2bSTaniya Das power-domains = <&rpmhpd SM8450_MMCX>; 72*1e910b2bSTaniya Das required-opps = <&rpmhpd_opp_low_svs>; 73*1e910b2bSTaniya Das #clock-cells = <1>; 74*1e910b2bSTaniya Das #reset-cells = <1>; 75*1e910b2bSTaniya Das #power-domain-cells = <1>; 76*1e910b2bSTaniya Das }; 77*1e910b2bSTaniya Das... 78