1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/bindings/clock/qcom,gcc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Global Clock & Reset Controller Binding 8 9maintainers: 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 12 13description: | 14 Qualcomm global clock control module which supports the clocks, resets and 15 power domains. 16 17properties: 18 compatible : 19 enum: 20 - qcom,gcc-apq8064 21 - qcom,gcc-apq8084 22 - qcom,gcc-ipq8064 23 - qcom,gcc-ipq4019 24 - qcom,gcc-ipq8074 25 - qcom,gcc-msm8660 26 - qcom,gcc-msm8916 27 - qcom,gcc-msm8960 28 - qcom,gcc-msm8974 29 - qcom,gcc-msm8974pro 30 - qcom,gcc-msm8974pro-ac 31 - qcom,gcc-msm8994 32 - qcom,gcc-msm8996 33 - qcom,gcc-msm8998 34 - qcom,gcc-mdm9615 35 - qcom,gcc-qcs404 36 - qcom,gcc-sc7180 37 - qcom,gcc-sdm630 38 - qcom,gcc-sdm660 39 - qcom,gcc-sdm845 40 - qcom,gcc-sm8150 41 42 clocks: 43 oneOf: 44 #qcom,gcc-sm8150 45 #qcom,gcc-sc7180 46 - items: 47 - description: Board XO source 48 - description: Board active XO source 49 - description: Sleep clock source 50 #qcom,gcc-msm8998 51 - items: 52 - description: Board XO source 53 - description: Sleep clock source 54 - description: USB 3.0 phy pipe clock 55 - description: UFS phy rx symbol clock for pipe 0 56 - description: UFS phy rx symbol clock for pipe 1 57 - description: UFS phy tx symbol clock 58 - description: PCIE phy pipe clock 59 60 clock-names: 61 oneOf: 62 #qcom,gcc-sm8150 63 #qcom,gcc-sc7180 64 - items: 65 - const: bi_tcxo 66 - const: bi_tcxo_ao 67 - const: sleep_clk 68 #qcom,gcc-msm8998 69 - items: 70 - const: xo 71 - const: sleep_clk 72 - const: usb3_pipe 73 - const: ufs_rx_symbol0 74 - const: ufs_rx_symbol1 75 - const: ufs_tx_symbol0 76 - const: pcie0_pipe 77 78 '#clock-cells': 79 const: 1 80 81 '#reset-cells': 82 const: 1 83 84 '#power-domain-cells': 85 const: 1 86 87 reg: 88 maxItems: 1 89 90 nvmem-cells: 91 minItems: 1 92 maxItems: 2 93 description: 94 Qualcomm TSENS (thermal sensor device) on some devices can 95 be part of GCC and hence the TSENS properties can also be part 96 of the GCC/clock-controller node. 97 For more details on the TSENS properties please refer 98 Documentation/devicetree/bindings/thermal/qcom-tsens.txt 99 100 nvmem-cell-names: 101 minItems: 1 102 maxItems: 2 103 description: 104 Names for each nvmem-cells specified. 105 items: 106 - const: calib 107 - const: calib_backup 108 109 'thermal-sensor-cells': 110 const: 1 111 112 protected-clocks: 113 description: 114 Protected clock specifier list as per common clock binding 115 116required: 117 - compatible 118 - reg 119 - '#clock-cells' 120 - '#reset-cells' 121 - '#power-domain-cells' 122 123if: 124 properties: 125 compatible: 126 contains: 127 const: qcom,gcc-apq8064 128 129then: 130 required: 131 - nvmem-cells 132 - nvmem-cell-names 133 - '#thermal-sensor-cells' 134 135else: 136 if: 137 properties: 138 compatible: 139 contains: 140 enum: 141 - qcom,gcc-msm8998 142 - qcom,gcc-sm8150 143 - qcom,gcc-sc7180 144 then: 145 required: 146 - clocks 147 - clock-names 148 149 150examples: 151 # Example for GCC for MSM8960: 152 - | 153 clock-controller@900000 { 154 compatible = "qcom,gcc-msm8960"; 155 reg = <0x900000 0x4000>; 156 #clock-cells = <1>; 157 #reset-cells = <1>; 158 #power-domain-cells = <1>; 159 }; 160 161 162 # Example of GCC with TSENS properties: 163 - | 164 clock-controller@900000 { 165 compatible = "qcom,gcc-apq8064"; 166 reg = <0x00900000 0x4000>; 167 nvmem-cells = <&tsens_calib>, <&tsens_backup>; 168 nvmem-cell-names = "calib", "calib_backup"; 169 #clock-cells = <1>; 170 #reset-cells = <1>; 171 #power-domain-cells = <1>; 172 #thermal-sensor-cells = <1>; 173 }; 174 175 # Example of GCC with protected-clocks properties: 176 - | 177 clock-controller@100000 { 178 compatible = "qcom,gcc-sdm845"; 179 reg = <0x100000 0x1f0000>; 180 protected-clocks = <187>, <188>, <189>, <190>, <191>; 181 #clock-cells = <1>; 182 #reset-cells = <1>; 183 #power-domain-cells = <1>; 184 }; 185 186 # Example of GCC with clock node properties for SM8150: 187 - | 188 clock-controller@100000 { 189 compatible = "qcom,gcc-sm8150"; 190 reg = <0x00100000 0x1f0000>; 191 clocks = <&rpmhcc 0>, <&rpmhcc 1>, <&sleep_clk>; 192 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 193 #clock-cells = <1>; 194 #reset-cells = <1>; 195 #power-domain-cells = <1>; 196 }; 197 198 # Example of GCC with clock nodes properties for SC7180: 199 - | 200 clock-controller@100000 { 201 compatible = "qcom,gcc-sc7180"; 202 reg = <0x100000 0x1f0000>; 203 clocks = <&rpmhcc 0>, <&rpmhcc 1>, <0>; 204 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 205 #clock-cells = <1>; 206 #reset-cells = <1>; 207 #power-domain-cells = <1>; 208 }; 209 210 # Example of MSM8998 GCC: 211 - | 212 clock-controller@100000 { 213 compatible = "qcom,gcc-msm8998"; 214 #clock-cells = <1>; 215 #reset-cells = <1>; 216 #power-domain-cells = <1>; 217 reg = <0x00100000 0xb0000>; 218 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, 219 <&sleep>, 220 <0>, 221 <0>, 222 <0>, 223 <0>, 224 <0>; 225 clock-names = "xo", 226 "sleep", 227 "usb3_pipe", 228 "ufs_rx_symbol0", 229 "ufs_rx_symbol1", 230 "ufs_tx_symbol0", 231 "pcie0_pipe"; 232 }; 233... 234