1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/bindings/clock/qcom,gcc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Global Clock & Reset Controller Binding 8 9maintainers: 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 12 13description: | 14 Qualcomm global clock control module which supports the clocks, resets and 15 power domains. 16 17properties: 18 compatible : 19 enum: 20 - qcom,gcc-apq8064 21 - qcom,gcc-apq8084 22 - qcom,gcc-ipq8064 23 - qcom,gcc-ipq4019 24 - qcom,gcc-ipq8074 25 - qcom,gcc-msm8660 26 - qcom,gcc-msm8916 27 - qcom,gcc-msm8960 28 - qcom,gcc-msm8974 29 - qcom,gcc-msm8974pro 30 - qcom,gcc-msm8974pro-ac 31 - qcom,gcc-msm8994 32 - qcom,gcc-msm8996 33 - qcom,gcc-msm8998 34 - qcom,gcc-mdm9615 35 - qcom,gcc-qcs404 36 - qcom,gcc-sc7180 37 - qcom,gcc-sdm630 38 - qcom,gcc-sdm660 39 - qcom,gcc-sdm845 40 - qcom,gcc-sm8150 41 42 clocks: 43 oneOf: 44 #qcom,gcc-sm8150 45 #qcom,gcc-sc7180 46 - items: 47 - description: Board XO source 48 - description: Board active XO source 49 - description: Sleep clock source 50 #qcom,gcc-msm8996 51 - items: 52 - description: XO source 53 - description: Second XO source 54 - description: Sleep clock source 55 #qcom,gcc-msm8998 56 - items: 57 - description: Board XO source 58 - description: Sleep clock source 59 - description: USB 3.0 phy pipe clock 60 - description: UFS phy rx symbol clock for pipe 0 61 - description: UFS phy rx symbol clock for pipe 1 62 - description: UFS phy tx symbol clock 63 - description: PCIE phy pipe clock 64 65 clock-names: 66 oneOf: 67 #qcom,gcc-sm8150 68 #qcom,gcc-sc7180 69 - items: 70 - const: bi_tcxo 71 - const: bi_tcxo_ao 72 - const: sleep_clk 73 #qcom,gcc-msm8996 74 - items: 75 - const: cxo 76 - const: cxo2 77 - const: sleep_clk 78 #qcom,gcc-msm8998 79 - items: 80 - const: xo 81 - const: sleep_clk 82 - const: usb3_pipe 83 - const: ufs_rx_symbol0 84 - const: ufs_rx_symbol1 85 - const: ufs_tx_symbol0 86 - const: pcie0_pipe 87 88 '#clock-cells': 89 const: 1 90 91 '#reset-cells': 92 const: 1 93 94 '#power-domain-cells': 95 const: 1 96 97 reg: 98 maxItems: 1 99 100 nvmem-cells: 101 minItems: 1 102 maxItems: 2 103 description: 104 Qualcomm TSENS (thermal sensor device) on some devices can 105 be part of GCC and hence the TSENS properties can also be part 106 of the GCC/clock-controller node. 107 For more details on the TSENS properties please refer 108 Documentation/devicetree/bindings/thermal/qcom-tsens.txt 109 110 nvmem-cell-names: 111 minItems: 1 112 maxItems: 2 113 description: 114 Names for each nvmem-cells specified. 115 items: 116 - const: calib 117 - const: calib_backup 118 119 'thermal-sensor-cells': 120 const: 1 121 122 protected-clocks: 123 description: 124 Protected clock specifier list as per common clock binding 125 126required: 127 - compatible 128 - reg 129 - '#clock-cells' 130 - '#reset-cells' 131 - '#power-domain-cells' 132 133if: 134 properties: 135 compatible: 136 contains: 137 const: qcom,gcc-apq8064 138 139then: 140 required: 141 - nvmem-cells 142 - nvmem-cell-names 143 - '#thermal-sensor-cells' 144 145else: 146 if: 147 properties: 148 compatible: 149 contains: 150 enum: 151 - qcom,gcc-msm8998 152 - qcom,gcc-sm8150 153 - qcom,gcc-sc7180 154 then: 155 required: 156 - clocks 157 - clock-names 158 159 160examples: 161 # Example for GCC for MSM8960: 162 - | 163 clock-controller@900000 { 164 compatible = "qcom,gcc-msm8960"; 165 reg = <0x900000 0x4000>; 166 #clock-cells = <1>; 167 #reset-cells = <1>; 168 #power-domain-cells = <1>; 169 }; 170 171 172 # Example of GCC with TSENS properties: 173 - | 174 clock-controller@900000 { 175 compatible = "qcom,gcc-apq8064"; 176 reg = <0x00900000 0x4000>; 177 nvmem-cells = <&tsens_calib>, <&tsens_backup>; 178 nvmem-cell-names = "calib", "calib_backup"; 179 #clock-cells = <1>; 180 #reset-cells = <1>; 181 #power-domain-cells = <1>; 182 #thermal-sensor-cells = <1>; 183 }; 184 185 # Example of GCC with protected-clocks properties: 186 - | 187 clock-controller@100000 { 188 compatible = "qcom,gcc-sdm845"; 189 reg = <0x100000 0x1f0000>; 190 protected-clocks = <187>, <188>, <189>, <190>, <191>; 191 #clock-cells = <1>; 192 #reset-cells = <1>; 193 #power-domain-cells = <1>; 194 }; 195 196 # Example of GCC with clock node properties for SM8150: 197 - | 198 clock-controller@100000 { 199 compatible = "qcom,gcc-sm8150"; 200 reg = <0x00100000 0x1f0000>; 201 clocks = <&rpmhcc 0>, <&rpmhcc 1>, <&sleep_clk>; 202 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 203 #clock-cells = <1>; 204 #reset-cells = <1>; 205 #power-domain-cells = <1>; 206 }; 207 208 # Example of GCC with clock nodes properties for SC7180: 209 - | 210 clock-controller@100000 { 211 compatible = "qcom,gcc-sc7180"; 212 reg = <0x100000 0x1f0000>; 213 clocks = <&rpmhcc 0>, <&rpmhcc 1>, <0>; 214 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 215 #clock-cells = <1>; 216 #reset-cells = <1>; 217 #power-domain-cells = <1>; 218 }; 219 220 # Example of MSM8998 GCC: 221 - | 222 clock-controller@100000 { 223 compatible = "qcom,gcc-msm8998"; 224 #clock-cells = <1>; 225 #reset-cells = <1>; 226 #power-domain-cells = <1>; 227 reg = <0x00100000 0xb0000>; 228 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, 229 <&sleep>, 230 <0>, 231 <0>, 232 <0>, 233 <0>, 234 <0>; 235 clock-names = "xo", 236 "sleep", 237 "usb3_pipe", 238 "ufs_rx_symbol0", 239 "ufs_rx_symbol1", 240 "ufs_tx_symbol0", 241 "pcie0_pipe"; 242 }; 243... 244