1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/bindings/clock/qcom,gcc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Global Clock & Reset Controller Binding 8 9maintainers: 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 12 13description: | 14 Qualcomm global clock control module which supports the clocks, resets and 15 power domains. 16 17properties: 18 compatible : 19 enum: 20 - qcom,gcc-apq8064 21 - qcom,gcc-apq8084 22 - qcom,gcc-ipq4019 23 - qcom,gcc-ipq6018 24 - qcom,gcc-ipq8064 25 - qcom,gcc-ipq8074 26 - qcom,gcc-msm8660 27 - qcom,gcc-msm8916 28 - qcom,gcc-msm8960 29 - qcom,gcc-msm8974 30 - qcom,gcc-msm8974pro 31 - qcom,gcc-msm8974pro-ac 32 - qcom,gcc-msm8994 33 - qcom,gcc-msm8996 34 - qcom,gcc-msm8998 35 - qcom,gcc-mdm9615 36 - qcom,gcc-qcs404 37 - qcom,gcc-sc7180 38 - qcom,gcc-sdm630 39 - qcom,gcc-sdm660 40 - qcom,gcc-sdm845 41 - qcom,gcc-sm8150 42 43 clocks: 44 oneOf: 45 #qcom,gcc-sm8150 46 #qcom,gcc-sc7180 47 - items: 48 - description: Board XO source 49 - description: Board active XO source 50 - description: Sleep clock source 51 #qcom,gcc-msm8996 52 - items: 53 - description: XO source 54 - description: Second XO source 55 - description: Sleep clock source 56 #qcom,gcc-msm8998 57 - items: 58 - description: Board XO source 59 - description: Sleep clock source 60 - description: USB 3.0 phy pipe clock 61 - description: UFS phy rx symbol clock for pipe 0 62 - description: UFS phy rx symbol clock for pipe 1 63 - description: UFS phy tx symbol clock 64 - description: PCIE phy pipe clock 65 66 clock-names: 67 oneOf: 68 #qcom,gcc-sm8150 69 #qcom,gcc-sc7180 70 - items: 71 - const: bi_tcxo 72 - const: bi_tcxo_ao 73 - const: sleep_clk 74 #qcom,gcc-msm8996 75 - items: 76 - const: cxo 77 - const: cxo2 78 - const: sleep_clk 79 #qcom,gcc-msm8998 80 - items: 81 - const: xo 82 - const: sleep_clk 83 - const: usb3_pipe 84 - const: ufs_rx_symbol0 85 - const: ufs_rx_symbol1 86 - const: ufs_tx_symbol0 87 - const: pcie0_pipe 88 89 '#clock-cells': 90 const: 1 91 92 '#reset-cells': 93 const: 1 94 95 '#power-domain-cells': 96 const: 1 97 98 reg: 99 maxItems: 1 100 101 nvmem-cells: 102 minItems: 1 103 maxItems: 2 104 description: 105 Qualcomm TSENS (thermal sensor device) on some devices can 106 be part of GCC and hence the TSENS properties can also be part 107 of the GCC/clock-controller node. 108 For more details on the TSENS properties please refer 109 Documentation/devicetree/bindings/thermal/qcom-tsens.txt 110 111 nvmem-cell-names: 112 minItems: 1 113 maxItems: 2 114 description: 115 Names for each nvmem-cells specified. 116 items: 117 - const: calib 118 - const: calib_backup 119 120 'thermal-sensor-cells': 121 const: 1 122 123 protected-clocks: 124 description: 125 Protected clock specifier list as per common clock binding 126 127required: 128 - compatible 129 - reg 130 - '#clock-cells' 131 - '#reset-cells' 132 - '#power-domain-cells' 133 134if: 135 properties: 136 compatible: 137 contains: 138 const: qcom,gcc-apq8064 139 140then: 141 required: 142 - nvmem-cells 143 - nvmem-cell-names 144 - '#thermal-sensor-cells' 145 146else: 147 if: 148 properties: 149 compatible: 150 contains: 151 enum: 152 - qcom,gcc-msm8998 153 - qcom,gcc-sm8150 154 - qcom,gcc-sc7180 155 then: 156 required: 157 - clocks 158 - clock-names 159 160 161examples: 162 # Example for GCC for MSM8960: 163 - | 164 clock-controller@900000 { 165 compatible = "qcom,gcc-msm8960"; 166 reg = <0x900000 0x4000>; 167 #clock-cells = <1>; 168 #reset-cells = <1>; 169 #power-domain-cells = <1>; 170 }; 171 172 173 # Example of GCC with TSENS properties: 174 - | 175 clock-controller@900000 { 176 compatible = "qcom,gcc-apq8064"; 177 reg = <0x00900000 0x4000>; 178 nvmem-cells = <&tsens_calib>, <&tsens_backup>; 179 nvmem-cell-names = "calib", "calib_backup"; 180 #clock-cells = <1>; 181 #reset-cells = <1>; 182 #power-domain-cells = <1>; 183 #thermal-sensor-cells = <1>; 184 }; 185 186 # Example of GCC with protected-clocks properties: 187 - | 188 clock-controller@100000 { 189 compatible = "qcom,gcc-sdm845"; 190 reg = <0x100000 0x1f0000>; 191 protected-clocks = <187>, <188>, <189>, <190>, <191>; 192 #clock-cells = <1>; 193 #reset-cells = <1>; 194 #power-domain-cells = <1>; 195 }; 196 197 # Example of GCC with clock node properties for SM8150: 198 - | 199 clock-controller@100000 { 200 compatible = "qcom,gcc-sm8150"; 201 reg = <0x00100000 0x1f0000>; 202 clocks = <&rpmhcc 0>, <&rpmhcc 1>, <&sleep_clk>; 203 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 204 #clock-cells = <1>; 205 #reset-cells = <1>; 206 #power-domain-cells = <1>; 207 }; 208 209 # Example of GCC with clock nodes properties for SC7180: 210 - | 211 clock-controller@100000 { 212 compatible = "qcom,gcc-sc7180"; 213 reg = <0x100000 0x1f0000>; 214 clocks = <&rpmhcc 0>, <&rpmhcc 1>, <0>; 215 clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 216 #clock-cells = <1>; 217 #reset-cells = <1>; 218 #power-domain-cells = <1>; 219 }; 220 221 # Example of MSM8998 GCC: 222 - | 223 #include <dt-bindings/clock/qcom,rpmcc.h> 224 clock-controller@100000 { 225 compatible = "qcom,gcc-msm8998"; 226 #clock-cells = <1>; 227 #reset-cells = <1>; 228 #power-domain-cells = <1>; 229 reg = <0x00100000 0xb0000>; 230 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, 231 <&sleep>, 232 <0>, 233 <0>, 234 <0>, 235 <0>, 236 <0>; 237 clock-names = "xo", 238 "sleep", 239 "usb3_pipe", 240 "ufs_rx_symbol0", 241 "ufs_rx_symbol1", 242 "ufs_tx_symbol0", 243 "pcie0_pipe"; 244 }; 245... 246