12a8aa18cSDouglas Anderson# SPDX-License-Identifier: GPL-2.0-only 22a8aa18cSDouglas Anderson%YAML 1.2 32a8aa18cSDouglas Anderson--- 42a8aa18cSDouglas Anderson$id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml# 52a8aa18cSDouglas Anderson$schema: http://devicetree.org/meta-schemas/core.yaml# 62a8aa18cSDouglas Anderson 7ece3c319SKrzysztof Kozlowskititle: Qualcomm Global Clock & Reset Controller on QCS404 82a8aa18cSDouglas Anderson 92a8aa18cSDouglas Andersonmaintainers: 102a8aa18cSDouglas Anderson - Stephen Boyd <sboyd@kernel.org> 11*60838878STaniya Das - Taniya Das <quic_tdas@quicinc.com> 122a8aa18cSDouglas Anderson 132a8aa18cSDouglas Andersondescription: | 14ece3c319SKrzysztof Kozlowski Qualcomm global clock control module provides the clocks, resets and power 15ece3c319SKrzysztof Kozlowski domains on QCS404. 162a8aa18cSDouglas Anderson 17ece3c319SKrzysztof Kozlowski See also:: include/dt-bindings/clock/qcom,gcc-qcs404.h 182a8aa18cSDouglas Anderson 192a8aa18cSDouglas Andersonproperties: 202a8aa18cSDouglas Anderson compatible: 212a8aa18cSDouglas Anderson const: qcom,gcc-qcs404 222a8aa18cSDouglas Anderson 23ccd7c9ddSDmitry Baryshkov clocks: 24ccd7c9ddSDmitry Baryshkov items: 25ccd7c9ddSDmitry Baryshkov - description: XO source 26ccd7c9ddSDmitry Baryshkov - description: Sleep clock source 27ccd7c9ddSDmitry Baryshkov - description: PCIe 0 PIPE clock (optional) 28ccd7c9ddSDmitry Baryshkov - description: DSI phy instance 0 dsi clock 29ccd7c9ddSDmitry Baryshkov - description: DSI phy instance 0 byte clock 30ccd7c9ddSDmitry Baryshkov - description: HDMI phy PLL clock 31ccd7c9ddSDmitry Baryshkov 32ccd7c9ddSDmitry Baryshkov clock-names: 33ccd7c9ddSDmitry Baryshkov items: 34ccd7c9ddSDmitry Baryshkov - const: cxo 35ccd7c9ddSDmitry Baryshkov - const: sleep_clk 36ccd7c9ddSDmitry Baryshkov - const: pcie_0_pipe_clk_src 37ccd7c9ddSDmitry Baryshkov - const: dsi0pll 38ccd7c9ddSDmitry Baryshkov - const: dsi0pllbyte 39ccd7c9ddSDmitry Baryshkov - const: hdmi_pll 40ccd7c9ddSDmitry Baryshkov 412a8aa18cSDouglas Andersonrequired: 422a8aa18cSDouglas Anderson - compatible 432a8aa18cSDouglas Anderson 44a89c8a1fSDmitry BaryshkovallOf: 45a89c8a1fSDmitry Baryshkov - $ref: qcom,gcc.yaml# 46a89c8a1fSDmitry Baryshkov 47a89c8a1fSDmitry BaryshkovunevaluatedProperties: false 487f464532SRob Herring 492a8aa18cSDouglas Andersonexamples: 502a8aa18cSDouglas Anderson - | 512a8aa18cSDouglas Anderson clock-controller@1800000 { 522a8aa18cSDouglas Anderson compatible = "qcom,gcc-qcs404"; 532a8aa18cSDouglas Anderson reg = <0x01800000 0x80000>; 542a8aa18cSDouglas Anderson #clock-cells = <1>; 552a8aa18cSDouglas Anderson #reset-cells = <1>; 56a89c8a1fSDmitry Baryshkov #power-domain-cells = <1>; 572a8aa18cSDouglas Anderson }; 582a8aa18cSDouglas Anderson... 59