1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/milbeaut-clock.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Milbeaut SoCs Clock Controller Binding 8 9maintainers: 10 - Taichi Sugaya <sugaya.taichi@socionext.com> 11 12description: | 13 Milbeaut SoCs Clock controller is an integrated clock controller, which 14 generates and supplies to all modules. 15 16 This binding uses common clock bindings 17 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 18 19properties: 20 compatible: 21 oneOf: 22 - items: 23 - enum: 24 - socionext,milbeaut-m10v-ccu 25 clocks: 26 maxItems: 1 27 description: external clock 28 29 '#clock-cells': 30 const: 1 31 32required: 33 - compatible 34 - reg 35 - clocks 36 - '#clock-cells' 37 38examples: 39 # Clock controller node: 40 - | 41 m10v-clk-ctrl@1d021000 { 42 compatible = "socionext,milbeaut-m10v-clk-ccu"; 43 reg = <0x1d021000 0x4000>; 44 #clock-cells = <1>; 45 clocks = <&clki40mhz>; 46 }; 47 48 # Required an external clock for Clock controller node: 49 - | 50 clocks { 51 clki40mhz: clki40mhz { 52 compatible = "fixed-clock"; 53 #clock-cells = <0>; 54 clock-frequency = <40000000>; 55 }; 56 /* other clocks */ 57 }; 58 59 # The clock consumer shall specify the desired clock-output of the clock 60 # controller as below by specifying output-id in its "clk" phandle cell. 61 # 2: uart 62 # 4: 32-bit timer 63 # 7: UHS-I/II 64 - | 65 serial@1e700010 { 66 compatible = "socionext,milbeaut-usio-uart"; 67 reg = <0x1e700010 0x10>; 68 interrupts = <0 141 0x4>, <0 149 0x4>; 69 interrupt-names = "rx", "tx"; 70 clocks = <&clk 2>; 71 }; 72 73... 74