1*16a14673SYassine Oudjana# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*16a14673SYassine Oudjana%YAML 1.2 3*16a14673SYassine Oudjana--- 4*16a14673SYassine Oudjana$id: "http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#" 5*16a14673SYassine Oudjana$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*16a14673SYassine Oudjana 7*16a14673SYassine Oudjanatitle: MediaTek AP Mixedsys Controller 8*16a14673SYassine Oudjana 9*16a14673SYassine Oudjanamaintainers: 10*16a14673SYassine Oudjana - Michael Turquette <mturquette@baylibre.com> 11*16a14673SYassine Oudjana - Stephen Boyd <sboyd@kernel.org> 12*16a14673SYassine Oudjana 13*16a14673SYassine Oudjanadescription: 14*16a14673SYassine Oudjana The Mediatek apmixedsys controller provides PLLs to the system. 15*16a14673SYassine Oudjana The clock values can be found in <dt-bindings/clock/mt*-clk.h>. 16*16a14673SYassine Oudjana 17*16a14673SYassine Oudjanaproperties: 18*16a14673SYassine Oudjana compatible: 19*16a14673SYassine Oudjana oneOf: 20*16a14673SYassine Oudjana - enum: 21*16a14673SYassine Oudjana - mediatek,mt6797-apmixedsys 22*16a14673SYassine Oudjana - mediatek,mt7622-apmixedsys 23*16a14673SYassine Oudjana - mediatek,mt7986-apmixedsys 24*16a14673SYassine Oudjana - mediatek,mt8135-apmixedsys 25*16a14673SYassine Oudjana - mediatek,mt8173-apmixedsys 26*16a14673SYassine Oudjana - mediatek,mt8516-apmixedsys 27*16a14673SYassine Oudjana - items: 28*16a14673SYassine Oudjana - const: mediatek,mt7623-apmixedsys 29*16a14673SYassine Oudjana - const: mediatek,mt2701-apmixedsys 30*16a14673SYassine Oudjana - const: syscon 31*16a14673SYassine Oudjana - items: 32*16a14673SYassine Oudjana - enum: 33*16a14673SYassine Oudjana - mediatek,mt2701-apmixedsys 34*16a14673SYassine Oudjana - mediatek,mt2712-apmixedsys 35*16a14673SYassine Oudjana - mediatek,mt6765-apmixedsys 36*16a14673SYassine Oudjana - mediatek,mt6779-apmixedsys 37*16a14673SYassine Oudjana - mediatek,mt7629-apmixedsys 38*16a14673SYassine Oudjana - mediatek,mt8167-apmixedsys 39*16a14673SYassine Oudjana - mediatek,mt8183-apmixedsys 40*16a14673SYassine Oudjana - const: syscon 41*16a14673SYassine Oudjana 42*16a14673SYassine Oudjana reg: 43*16a14673SYassine Oudjana maxItems: 1 44*16a14673SYassine Oudjana 45*16a14673SYassine Oudjana '#clock-cells': 46*16a14673SYassine Oudjana const: 1 47*16a14673SYassine Oudjana 48*16a14673SYassine Oudjanarequired: 49*16a14673SYassine Oudjana - compatible 50*16a14673SYassine Oudjana - reg 51*16a14673SYassine Oudjana - '#clock-cells' 52*16a14673SYassine Oudjana 53*16a14673SYassine OudjanaadditionalProperties: false 54*16a14673SYassine Oudjana 55*16a14673SYassine Oudjanaexamples: 56*16a14673SYassine Oudjana - | 57*16a14673SYassine Oudjana apmixedsys: clock-controller@10209000 { 58*16a14673SYassine Oudjana compatible = "mediatek,mt8173-apmixedsys"; 59*16a14673SYassine Oudjana reg = <0x10209000 0x1000>; 60*16a14673SYassine Oudjana #clock-cells = <1>; 61*16a14673SYassine Oudjana }; 62