18a3d9c16SRob Herring* Marvell PXA1928 Clock Controllers 28a3d9c16SRob Herring 38a3d9c16SRob HerringThe PXA1928 clock subsystem generates and supplies clock to various 48a3d9c16SRob Herringcontrollers within the PXA1928 SoC. The PXA1928 contains 3 clock controller 58a3d9c16SRob Herringblocks called APMU, MPMU, and APBC roughly corresponding to internal buses. 68a3d9c16SRob Herring 78a3d9c16SRob HerringRequired Properties: 88a3d9c16SRob Herring 98a3d9c16SRob Herring- compatible: should be one of the following. 108a3d9c16SRob Herring - "marvell,pxa1928-apmu" - APMU controller compatible 118a3d9c16SRob Herring - "marvell,pxa1928-mpmu" - MPMU controller compatible 128a3d9c16SRob Herring - "marvell,pxa1928-apbc" - APBC controller compatible 138a3d9c16SRob Herring- reg: physical base address of the clock controller and length of memory mapped 148a3d9c16SRob Herring region. 158a3d9c16SRob Herring- #clock-cells: should be 1. 168a3d9c16SRob Herring- #reset-cells: should be 1. 178a3d9c16SRob Herring 188a3d9c16SRob HerringEach clock is assigned an identifier and client nodes use the clock controller 198a3d9c16SRob Herringphandle and this identifier to specify the clock which they consume. 208a3d9c16SRob Herring 218a3d9c16SRob HerringAll these identifiers can be found in <dt-bindings/clock/marvell,pxa1928.h>. 22