12bea59d3SDinh Nguyen# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 22bea59d3SDinh Nguyen%YAML 1.2 32bea59d3SDinh Nguyen--- 42bea59d3SDinh Nguyen$id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml# 52bea59d3SDinh Nguyen$schema: http://devicetree.org/meta-schemas/core.yaml# 62bea59d3SDinh Nguyen 7*84e85359SKrzysztof Kozlowskititle: Intel SoCFPGA eASIC N5X platform clock controller 82bea59d3SDinh Nguyen 92bea59d3SDinh Nguyenmaintainers: 102bea59d3SDinh Nguyen - Dinh Nguyen <dinguyen@kernel.org> 112bea59d3SDinh Nguyen 122bea59d3SDinh Nguyendescription: 132bea59d3SDinh Nguyen The Intel eASIC N5X Clock controller is an integrated clock controller, which 142bea59d3SDinh Nguyen generates and supplies to all modules. 152bea59d3SDinh Nguyen 162bea59d3SDinh Nguyenproperties: 172bea59d3SDinh Nguyen compatible: 182bea59d3SDinh Nguyen const: intel,easic-n5x-clkmgr 192bea59d3SDinh Nguyen 202bea59d3SDinh Nguyen '#clock-cells': 212bea59d3SDinh Nguyen const: 1 222bea59d3SDinh Nguyen 232bea59d3SDinh Nguyen reg: 242bea59d3SDinh Nguyen maxItems: 1 252bea59d3SDinh Nguyen 262bea59d3SDinh Nguyen clocks: 272bea59d3SDinh Nguyen maxItems: 1 282bea59d3SDinh Nguyen 292bea59d3SDinh Nguyenrequired: 302bea59d3SDinh Nguyen - compatible 312bea59d3SDinh Nguyen - reg 322bea59d3SDinh Nguyen - clocks 332bea59d3SDinh Nguyen - '#clock-cells' 342bea59d3SDinh Nguyen 352bea59d3SDinh NguyenadditionalProperties: false 362bea59d3SDinh Nguyen 372bea59d3SDinh Nguyenexamples: 382bea59d3SDinh Nguyen # Clock controller node: 392bea59d3SDinh Nguyen - | 402bea59d3SDinh Nguyen clkmgr: clock-controller@ffd10000 { 412bea59d3SDinh Nguyen compatible = "intel,easic-n5x-clkmgr"; 422bea59d3SDinh Nguyen reg = <0xffd10000 0x1000>; 432bea59d3SDinh Nguyen clocks = <&osc1>; 442bea59d3SDinh Nguyen #clock-cells = <1>; 452bea59d3SDinh Nguyen }; 462bea59d3SDinh Nguyen... 47