1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/imx8mp-audiomix.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8MP AudioMIX Block Control
8
9maintainers:
10  - Marek Vasut <marex@denx.de>
11
12description: |
13  NXP i.MX8M Plus AudioMIX is dedicated clock muxing and gating IP
14  used to control Audio related clock on the SoC.
15
16properties:
17  compatible:
18    const: fsl,imx8mp-audio-blk-ctrl
19
20  reg:
21    maxItems: 1
22
23  power-domains:
24    maxItems: 1
25
26  clocks:
27    minItems: 7
28    maxItems: 7
29
30  clock-names:
31    items:
32      - const: ahb
33      - const: sai1
34      - const: sai2
35      - const: sai3
36      - const: sai5
37      - const: sai6
38      - const: sai7
39
40  '#clock-cells':
41    const: 1
42    description:
43      The clock consumer should specify the desired clock by having the clock
44      ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h
45      for the full list of i.MX8MP IMX8MP_CLK_AUDIOMIX_ clock IDs.
46
47required:
48  - compatible
49  - reg
50  - clocks
51  - clock-names
52  - power-domains
53  - '#clock-cells'
54
55additionalProperties: false
56
57examples:
58  # Clock Control Module node:
59  - |
60    #include <dt-bindings/clock/imx8mp-clock.h>
61
62    clock-controller@30e20000 {
63        compatible = "fsl,imx8mp-audio-blk-ctrl";
64        reg = <0x30e20000 0x10000>;
65        #clock-cells = <1>;
66        clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
67                 <&clk IMX8MP_CLK_SAI1>,
68                 <&clk IMX8MP_CLK_SAI2>,
69                 <&clk IMX8MP_CLK_SAI3>,
70                 <&clk IMX8MP_CLK_SAI5>,
71                 <&clk IMX8MP_CLK_SAI6>,
72                 <&clk IMX8MP_CLK_SAI7>;
73        clock-names = "ahb",
74                      "sai1", "sai2", "sai3",
75                      "sai5", "sai6", "sai7";
76        power-domains = <&pgc_audio>;
77    };
78
79...
80