1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/imx8m-clock.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP i.MX8M Family Clock Control Module 8 9maintainers: 10 - Anson Huang <Anson.Huang@nxp.com> 11 12description: | 13 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock 14 controller, which generates and supplies to all modules. 15 16properties: 17 compatible: 18 enum: 19 - fsl,imx8mm-ccm 20 - fsl,imx8mn-ccm 21 - fsl,imx8mp-ccm 22 - fsl,imx8mq-ccm 23 24 reg: 25 maxItems: 1 26 27 interrupts: 28 maxItems: 2 29 30 clocks: 31 minItems: 6 32 maxItems: 7 33 34 clock-names: 35 minItems: 6 36 maxItems: 7 37 38 '#clock-cells': 39 const: 1 40 description: 41 The clock consumer should specify the desired clock by having the clock 42 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h 43 for the full list of i.MX8M clock IDs. 44 45required: 46 - compatible 47 - reg 48 - clocks 49 - clock-names 50 - '#clock-cells' 51 52allOf: 53 - if: 54 properties: 55 compatible: 56 contains: 57 const: fsl,imx8mq-ccm 58 then: 59 properties: 60 clocks: 61 items: 62 - description: 32k osc 63 - description: 25m osc 64 - description: 27m osc 65 - description: ext1 clock input 66 - description: ext2 clock input 67 - description: ext3 clock input 68 - description: ext4 clock input 69 clock-names: 70 items: 71 - const: ckil 72 - const: osc_25m 73 - const: osc_27m 74 - const: clk_ext1 75 - const: clk_ext2 76 - const: clk_ext3 77 - const: clk_ext4 78 else: 79 properties: 80 clocks: 81 items: 82 - description: 32k osc 83 - description: 24m osc 84 - description: ext1 clock input 85 - description: ext2 clock input 86 - description: ext3 clock input 87 - description: ext4 clock input 88 89 clock-names: 90 items: 91 - const: osc_32k 92 - const: osc_24m 93 - const: clk_ext1 94 - const: clk_ext2 95 - const: clk_ext3 96 - const: clk_ext4 97 98additionalProperties: false 99 100examples: 101 # Clock Control Module node: 102 - | 103 clock-controller@30380000 { 104 compatible = "fsl,imx8mm-ccm"; 105 reg = <0x30380000 0x10000>; 106 #clock-cells = <1>; 107 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, 108 <&clk_ext3>, <&clk_ext4>; 109 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", 110 "clk_ext3", "clk_ext4"; 111 }; 112 113 - | 114 clock-controller@30380000 { 115 compatible = "fsl,imx8mq-ccm"; 116 reg = <0x30380000 0x10000>; 117 #clock-cells = <1>; 118 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>, 119 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; 120 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1", 121 "clk_ext2", "clk_ext3", "clk_ext4"; 122 }; 123 124... 125