167e35adfSAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 267e35adfSAnson Huang%YAML 1.2 367e35adfSAnson Huang--- 467e35adfSAnson Huang$id: http://devicetree.org/schemas/clock/imx1-clock.yaml# 567e35adfSAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml# 667e35adfSAnson Huang 7*33cd7c6fSKrzysztof Kozlowskititle: Freescale i.MX1 CPUs Clock Controller 867e35adfSAnson Huang 967e35adfSAnson Huangmaintainers: 1067e35adfSAnson Huang - Alexander Shiyan <shc_work@mail.ru> 1167e35adfSAnson Huang 1267e35adfSAnson Huangdescription: | 1367e35adfSAnson Huang The clock consumer should specify the desired clock by having the clock 1467e35adfSAnson Huang ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx1-clock.h 1567e35adfSAnson Huang for the full list of i.MX1 clock IDs. 1667e35adfSAnson Huang 1767e35adfSAnson Huangproperties: 1867e35adfSAnson Huang compatible: 1967e35adfSAnson Huang const: fsl,imx1-ccm 2067e35adfSAnson Huang 2167e35adfSAnson Huang reg: 2267e35adfSAnson Huang maxItems: 1 2367e35adfSAnson Huang 2467e35adfSAnson Huang '#clock-cells': 2567e35adfSAnson Huang const: 1 2667e35adfSAnson Huang 2767e35adfSAnson Huangrequired: 2867e35adfSAnson Huang - compatible 2967e35adfSAnson Huang - reg 3067e35adfSAnson Huang - '#clock-cells' 3167e35adfSAnson Huang 3267e35adfSAnson HuangadditionalProperties: false 3367e35adfSAnson Huang 3467e35adfSAnson Huangexamples: 3567e35adfSAnson Huang - | 3667e35adfSAnson Huang #include <dt-bindings/clock/imx1-clock.h> 3767e35adfSAnson Huang 3867e35adfSAnson Huang clock-controller@21b000 { 3967e35adfSAnson Huang #clock-cells = <1>; 4067e35adfSAnson Huang compatible = "fsl,imx1-ccm"; 4167e35adfSAnson Huang reg = <0x0021b000 0x1000>; 4267e35adfSAnson Huang }; 43