1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Binding for IDT VersaClock 5 and 6 programmable I2C clock generators
8
9description: |
10  The IDT VersaClock 5 and VersaClock 6 are programmable I2C
11  clock generators providing from 3 to 12 output clocks.
12
13  When referencing the provided clock in the DT using phandle and clock
14  specifier, the following mapping applies:
15
16  - 5P49V5923:
17    0 -- OUT0_SEL_I2CB
18    1 -- OUT1
19    2 -- OUT2
20
21  - 5P49V5933:
22    0 -- OUT0_SEL_I2CB
23    1 -- OUT1
24    2 -- OUT4
25
26  - other parts:
27    0 -- OUT0_SEL_I2CB
28    1 -- OUT1
29    2 -- OUT2
30    3 -- OUT3
31    4 -- OUT4
32
33maintainers:
34  - Luca Ceresoli <luca@lucaceresoli.net>
35
36properties:
37  compatible:
38    enum:
39      - idt,5p49v5923
40      - idt,5p49v5925
41      - idt,5p49v5933
42      - idt,5p49v5935
43      - idt,5p49v6901
44      - idt,5p49v6965
45
46  reg:
47    description: I2C device address
48    enum: [ 0x68, 0x6a ]
49
50  '#clock-cells':
51    const: 1
52
53  clock-names:
54    minItems: 1
55    maxItems: 2
56    items:
57      enum: [ xin, clkin ]
58  clocks:
59    minItems: 1
60    maxItems: 2
61
62  idt,xtal-load-femtofarads:
63    $ref: /schemas/types.yaml#/definitions/uint32
64    minimum: 9000
65    maximum: 22760
66    description: Optional load capacitor for XTAL1 and XTAL2
67
68patternProperties:
69  "^OUT[1-4]$":
70    type: object
71    description:
72      Description of one of the outputs (OUT1..OUT4). See "Clock1 Output
73      Configuration" in the Versaclock 5/6/6E Family Register Description
74      and Programming Guide.
75    properties:
76      idt,mode:
77        description:
78          The output drive mode. Values defined in dt-bindings/clk/versaclock.h
79        $ref: /schemas/types.yaml#/definitions/uint32
80        minimum: 0
81        maximum: 6
82      idt,voltage-microvolt:
83        description: The output drive voltage.
84        enum: [ 1800000, 2500000, 3300000 ]
85      idt,slew-percent:
86        description: The Slew rate control for CMOS single-ended.
87        $ref: /schemas/types.yaml#/definitions/uint32
88        enum: [ 80, 85, 90, 100 ]
89
90required:
91  - compatible
92  - reg
93  - '#clock-cells'
94
95allOf:
96  - if:
97      properties:
98        compatible:
99          enum:
100            - idt,5p49v5933
101            - idt,5p49v5935
102    then:
103      # Devices with builtin crystal + optional external input
104      properties:
105        clock-names:
106          const: clkin
107        clocks:
108          maxItems: 1
109    else:
110      # Devices without builtin crystal
111      required:
112        - clock-names
113        - clocks
114
115additionalProperties: false
116
117examples:
118  - |
119    #include <dt-bindings/clk/versaclock.h>
120
121    /* 25MHz reference crystal */
122    ref25: ref25m {
123        compatible = "fixed-clock";
124        #clock-cells = <0>;
125        clock-frequency = <25000000>;
126    };
127
128    i2c@0 {
129        reg = <0x0 0x100>;
130        #address-cells = <1>;
131        #size-cells = <0>;
132
133        /* IDT 5P49V5923 I2C clock generator */
134        vc5: clock-generator@6a {
135            compatible = "idt,5p49v5923";
136            reg = <0x6a>;
137            #clock-cells = <1>;
138
139            /* Connect XIN input to 25MHz reference */
140            clocks = <&ref25m>;
141            clock-names = "xin";
142
143            OUT1 {
144                idt,drive-mode = <VC5_CMOSD>;
145                idt,voltage-microvolts = <1800000>;
146                idt,slew-percent = <80>;
147            };
148
149            OUT4 {
150                idt,drive-mode = <VC5_LVDS>;
151            };
152        };
153    };
154
155    /* Consumer referencing the 5P49V5923 pin OUT1 */
156    consumer {
157        /* ... */
158        clocks = <&vc5 1>;
159        /* ... */
160    };
161
162...
163