18e972afbSDaniel Mack# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28e972afbSDaniel Mack%YAML 1.2 38e972afbSDaniel Mack--- 48e972afbSDaniel Mack$id: http://devicetree.org/schemas/clock/cirrus,cs2000-cp.yaml# 58e972afbSDaniel Mack$schema: http://devicetree.org/meta-schemas/core.yaml# 68e972afbSDaniel Mack 78e972afbSDaniel Macktitle: Binding CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier 88e972afbSDaniel Mack 98e972afbSDaniel Mackmaintainers: 108e972afbSDaniel Mack - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 118e972afbSDaniel Mack 128e972afbSDaniel Mackdescription: | 138e972afbSDaniel Mack The CS2000-CP is an extremely versatile system clocking device that 148e972afbSDaniel Mack utilizes a programmable phase lock loop. 158e972afbSDaniel Mack 168e972afbSDaniel Mack Link: https://www.cirrus.com/products/cs2000/ 178e972afbSDaniel Mack 188e972afbSDaniel Mackproperties: 198e972afbSDaniel Mack compatible: 208e972afbSDaniel Mack enum: 218e972afbSDaniel Mack - cirrus,cs2000-cp 228e972afbSDaniel Mack 238e972afbSDaniel Mack clocks: 248e972afbSDaniel Mack description: 258e972afbSDaniel Mack Common clock binding for CLK_IN, XTI/REF_CLK 268e972afbSDaniel Mack minItems: 2 278e972afbSDaniel Mack maxItems: 2 288e972afbSDaniel Mack 298e972afbSDaniel Mack clock-names: 308e972afbSDaniel Mack items: 318e972afbSDaniel Mack - const: clk_in 328e972afbSDaniel Mack - const: ref_clk 338e972afbSDaniel Mack 348e972afbSDaniel Mack '#clock-cells': 358e972afbSDaniel Mack const: 0 368e972afbSDaniel Mack 378e972afbSDaniel Mack reg: 388e972afbSDaniel Mack maxItems: 1 398e972afbSDaniel Mack 4068643c37SDaniel Mack cirrus,aux-output-source: 4168643c37SDaniel Mack description: 4268643c37SDaniel Mack Specifies the function of the auxiliary clock output pin 4368643c37SDaniel Mack $ref: /schemas/types.yaml#/definitions/uint32 4468643c37SDaniel Mack enum: 4568643c37SDaniel Mack - 0 # CS2000CP_AUX_OUTPUT_REF_CLK: ref_clk input 4668643c37SDaniel Mack - 1 # CS2000CP_AUX_OUTPUT_CLK_IN: clk_in input 4768643c37SDaniel Mack - 2 # CS2000CP_AUX_OUTPUT_CLK_OUT: clk_out output 4868643c37SDaniel Mack - 3 # CS2000CP_AUX_OUTPUT_PLL_LOCK: pll lock status 4968643c37SDaniel Mack default: 0 5068643c37SDaniel Mack 5111dda11fSDaniel Mack cirrus,clock-skip: 5211dda11fSDaniel Mack description: 5311dda11fSDaniel Mack This mode allows the PLL to maintain lock even when CLK_IN 5411dda11fSDaniel Mack has missing pulses for up to 20 ms. 5511dda11fSDaniel Mack $ref: /schemas/types.yaml#/definitions/flag 5611dda11fSDaniel Mack 57*519ba32eSDaniel Mack cirrus,dynamic-mode: 58*519ba32eSDaniel Mack description: 59*519ba32eSDaniel Mack In dynamic mode, the CLK_IN input is used to drive the 60*519ba32eSDaniel Mack digital PLL of the silicon. 61*519ba32eSDaniel Mack If not given, the static mode shall be used to derive the 62*519ba32eSDaniel Mack output signal directly from the REF_CLK input. 63*519ba32eSDaniel Mack $ref: /schemas/types.yaml#/definitions/flag 64*519ba32eSDaniel Mack 658e972afbSDaniel Mackrequired: 668e972afbSDaniel Mack - compatible 678e972afbSDaniel Mack - reg 688e972afbSDaniel Mack - clocks 698e972afbSDaniel Mack - clock-names 708e972afbSDaniel Mack - '#clock-cells' 718e972afbSDaniel Mack 728e972afbSDaniel MackadditionalProperties: false 738e972afbSDaniel Mack 748e972afbSDaniel Mackexamples: 758e972afbSDaniel Mack - | 7668643c37SDaniel Mack #include <dt-bindings/clock/cirrus,cs2000-cp.h> 7768643c37SDaniel Mack 788e972afbSDaniel Mack i2c@0 { 798e972afbSDaniel Mack reg = <0x0 0x100>; 808e972afbSDaniel Mack #address-cells = <1>; 818e972afbSDaniel Mack #size-cells = <0>; 828e972afbSDaniel Mack 838e972afbSDaniel Mack clock-controller@4f { 848e972afbSDaniel Mack #clock-cells = <0>; 858e972afbSDaniel Mack compatible = "cirrus,cs2000-cp"; 868e972afbSDaniel Mack reg = <0x4f>; 878e972afbSDaniel Mack clocks = <&rcar_sound 0>, <&x12_clk>; 888e972afbSDaniel Mack clock-names = "clk_in", "ref_clk"; 8968643c37SDaniel Mack cirrus,aux-output-source = <CS2000CP_AUX_OUTPUT_CLK_OUT>; 908e972afbSDaniel Mack }; 918e972afbSDaniel Mack }; 92