18e972afbSDaniel Mack# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28e972afbSDaniel Mack%YAML 1.2 38e972afbSDaniel Mack--- 48e972afbSDaniel Mack$id: http://devicetree.org/schemas/clock/cirrus,cs2000-cp.yaml# 58e972afbSDaniel Mack$schema: http://devicetree.org/meta-schemas/core.yaml# 68e972afbSDaniel Mack 78e972afbSDaniel Macktitle: Binding CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier 88e972afbSDaniel Mack 98e972afbSDaniel Mackmaintainers: 108e972afbSDaniel Mack - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 118e972afbSDaniel Mack 128e972afbSDaniel Mackdescription: | 138e972afbSDaniel Mack The CS2000-CP is an extremely versatile system clocking device that 148e972afbSDaniel Mack utilizes a programmable phase lock loop. 158e972afbSDaniel Mack 168e972afbSDaniel Mack Link: https://www.cirrus.com/products/cs2000/ 178e972afbSDaniel Mack 188e972afbSDaniel Mackproperties: 198e972afbSDaniel Mack compatible: 208e972afbSDaniel Mack enum: 218e972afbSDaniel Mack - cirrus,cs2000-cp 228e972afbSDaniel Mack 238e972afbSDaniel Mack clocks: 248e972afbSDaniel Mack description: 258e972afbSDaniel Mack Common clock binding for CLK_IN, XTI/REF_CLK 268e972afbSDaniel Mack minItems: 2 278e972afbSDaniel Mack maxItems: 2 288e972afbSDaniel Mack 298e972afbSDaniel Mack clock-names: 308e972afbSDaniel Mack items: 318e972afbSDaniel Mack - const: clk_in 328e972afbSDaniel Mack - const: ref_clk 338e972afbSDaniel Mack 348e972afbSDaniel Mack '#clock-cells': 358e972afbSDaniel Mack const: 0 368e972afbSDaniel Mack 378e972afbSDaniel Mack reg: 388e972afbSDaniel Mack maxItems: 1 398e972afbSDaniel Mack 4068643c37SDaniel Mack cirrus,aux-output-source: 4168643c37SDaniel Mack description: 4268643c37SDaniel Mack Specifies the function of the auxiliary clock output pin 4368643c37SDaniel Mack $ref: /schemas/types.yaml#/definitions/uint32 4468643c37SDaniel Mack enum: 4568643c37SDaniel Mack - 0 # CS2000CP_AUX_OUTPUT_REF_CLK: ref_clk input 4668643c37SDaniel Mack - 1 # CS2000CP_AUX_OUTPUT_CLK_IN: clk_in input 4768643c37SDaniel Mack - 2 # CS2000CP_AUX_OUTPUT_CLK_OUT: clk_out output 4868643c37SDaniel Mack - 3 # CS2000CP_AUX_OUTPUT_PLL_LOCK: pll lock status 4968643c37SDaniel Mack default: 0 5068643c37SDaniel Mack 51*11dda11fSDaniel Mack cirrus,clock-skip: 52*11dda11fSDaniel Mack description: 53*11dda11fSDaniel Mack This mode allows the PLL to maintain lock even when CLK_IN 54*11dda11fSDaniel Mack has missing pulses for up to 20 ms. 55*11dda11fSDaniel Mack $ref: /schemas/types.yaml#/definitions/flag 56*11dda11fSDaniel Mack 578e972afbSDaniel Mackrequired: 588e972afbSDaniel Mack - compatible 598e972afbSDaniel Mack - reg 608e972afbSDaniel Mack - clocks 618e972afbSDaniel Mack - clock-names 628e972afbSDaniel Mack - '#clock-cells' 638e972afbSDaniel Mack 648e972afbSDaniel MackadditionalProperties: false 658e972afbSDaniel Mack 668e972afbSDaniel Mackexamples: 678e972afbSDaniel Mack - | 6868643c37SDaniel Mack #include <dt-bindings/clock/cirrus,cs2000-cp.h> 6968643c37SDaniel Mack 708e972afbSDaniel Mack i2c@0 { 718e972afbSDaniel Mack reg = <0x0 0x100>; 728e972afbSDaniel Mack #address-cells = <1>; 738e972afbSDaniel Mack #size-cells = <0>; 748e972afbSDaniel Mack 758e972afbSDaniel Mack clock-controller@4f { 768e972afbSDaniel Mack #clock-cells = <0>; 778e972afbSDaniel Mack compatible = "cirrus,cs2000-cp"; 788e972afbSDaniel Mack reg = <0x4f>; 798e972afbSDaniel Mack clocks = <&rcar_sound 0>, <&x12_clk>; 808e972afbSDaniel Mack clock-names = "clk_in", "ref_clk"; 8168643c37SDaniel Mack cirrus,aux-output-source = <CS2000CP_AUX_OUTPUT_CLK_OUT>; 828e972afbSDaniel Mack }; 838e972afbSDaniel Mack }; 84