12c74b539SEric AnholtBroadcom BCM2835 CPRMAN clocks 22c74b539SEric Anholt 32c74b539SEric AnholtThis binding uses the common clock binding: 42c74b539SEric Anholt Documentation/devicetree/bindings/clock/clock-bindings.txt 52c74b539SEric Anholt 62c74b539SEric AnholtThe CPRMAN clock controller generates clocks in the audio power domain 72c74b539SEric Anholtof the BCM2835. There is a level of PLLs deriving from an external 82c74b539SEric Anholtoscillator, a level of PLL dividers that produce channels off of the 92c74b539SEric Anholtfew PLLs, and a level of mostly-generic clock generators sourcing from 102c74b539SEric Anholtthe PLL channels. Most other hardware components source from the 112c74b539SEric Anholtclock generators, but a few (like the ARM or HDMI) will source from 122c74b539SEric Anholtthe PLL dividers directly. 132c74b539SEric Anholt 142c74b539SEric AnholtRequired properties: 1580766f87SStefan Wahren- compatible: should be one of the following, 1680766f87SStefan Wahren "brcm,bcm2711-cprman" 1780766f87SStefan Wahren "brcm,bcm2835-cprman" 182c74b539SEric Anholt- #clock-cells: Should be <1>. The permitted clock-specifier values can be 192c74b539SEric Anholt found in include/dt-bindings/clock/bcm2835.h 202c74b539SEric Anholt- reg: Specifies base physical address and size of the registers 218a39e9faSEric Anholt- clocks: phandles to the parent clocks used as input to the module, in 228a39e9faSEric Anholt the following order: 238a39e9faSEric Anholt 248a39e9faSEric Anholt - External oscillator 258a39e9faSEric Anholt - DSI0 byte clock 268a39e9faSEric Anholt - DSI0 DDR2 clock 278a39e9faSEric Anholt - DSI0 DDR clock 288a39e9faSEric Anholt - DSI1 byte clock 298a39e9faSEric Anholt - DSI1 DDR2 clock 308a39e9faSEric Anholt - DSI1 DDR clock 318a39e9faSEric Anholt 328a39e9faSEric Anholt Only external oscillator is required. The DSI clocks may 338a39e9faSEric Anholt not be present, in which case their children will be 348a39e9faSEric Anholt unusable. 352c74b539SEric Anholt 362c74b539SEric AnholtExample: 372c74b539SEric Anholt 382c74b539SEric Anholt clk_osc: clock@3 { 392c74b539SEric Anholt compatible = "fixed-clock"; 402c74b539SEric Anholt reg = <3>; 412c74b539SEric Anholt #clock-cells = <0>; 422c74b539SEric Anholt clock-output-names = "osc"; 432c74b539SEric Anholt clock-frequency = <19200000>; 442c74b539SEric Anholt }; 452c74b539SEric Anholt 462c74b539SEric Anholt clocks: cprman@7e101000 { 472c74b539SEric Anholt compatible = "brcm,bcm2835-cprman"; 482c74b539SEric Anholt #clock-cells = <1>; 492c74b539SEric Anholt reg = <0x7e101000 0x2000>; 502c74b539SEric Anholt clocks = <&clk_osc>; 512c74b539SEric Anholt }; 522c74b539SEric Anholt 532c74b539SEric Anholt i2c0: i2c@7e205000 { 542c74b539SEric Anholt compatible = "brcm,bcm2835-i2c"; 552c74b539SEric Anholt reg = <0x7e205000 0x1000>; 562c74b539SEric Anholt interrupts = <2 21>; 572c74b539SEric Anholt clocks = <&clocks BCM2835_CLOCK_VPU>; 582c74b539SEric Anholt #address-cells = <1>; 592c74b539SEric Anholt #size-cells = <0>; 602c74b539SEric Anholt }; 61