1*98872da6SDmitry Rokosov# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*98872da6SDmitry Rokosov%YAML 1.2 3*98872da6SDmitry Rokosov--- 4*98872da6SDmitry Rokosov$id: http://devicetree.org/schemas/clock/amlogic,a1-peripherals-clkc.yaml# 5*98872da6SDmitry Rokosov$schema: http://devicetree.org/meta-schemas/core.yaml# 6*98872da6SDmitry Rokosov 7*98872da6SDmitry Rokosovtitle: Amlogic A1 Peripherals Clock Control Unit 8*98872da6SDmitry Rokosov 9*98872da6SDmitry Rokosovmaintainers: 10*98872da6SDmitry Rokosov - Neil Armstrong <neil.armstrong@linaro.org> 11*98872da6SDmitry Rokosov - Jerome Brunet <jbrunet@baylibre.com> 12*98872da6SDmitry Rokosov - Jian Hu <jian.hu@jian.hu.com> 13*98872da6SDmitry Rokosov - Dmitry Rokosov <ddrokosov@sberdevices.ru> 14*98872da6SDmitry Rokosov 15*98872da6SDmitry Rokosovproperties: 16*98872da6SDmitry Rokosov compatible: 17*98872da6SDmitry Rokosov const: amlogic,a1-peripherals-clkc 18*98872da6SDmitry Rokosov 19*98872da6SDmitry Rokosov '#clock-cells': 20*98872da6SDmitry Rokosov const: 1 21*98872da6SDmitry Rokosov 22*98872da6SDmitry Rokosov reg: 23*98872da6SDmitry Rokosov maxItems: 1 24*98872da6SDmitry Rokosov 25*98872da6SDmitry Rokosov clocks: 26*98872da6SDmitry Rokosov items: 27*98872da6SDmitry Rokosov - description: input fixed pll div2 28*98872da6SDmitry Rokosov - description: input fixed pll div3 29*98872da6SDmitry Rokosov - description: input fixed pll div5 30*98872da6SDmitry Rokosov - description: input fixed pll div7 31*98872da6SDmitry Rokosov - description: input hifi pll 32*98872da6SDmitry Rokosov - description: input oscillator (usually at 24MHz) 33*98872da6SDmitry Rokosov 34*98872da6SDmitry Rokosov clock-names: 35*98872da6SDmitry Rokosov items: 36*98872da6SDmitry Rokosov - const: fclk_div2 37*98872da6SDmitry Rokosov - const: fclk_div3 38*98872da6SDmitry Rokosov - const: fclk_div5 39*98872da6SDmitry Rokosov - const: fclk_div7 40*98872da6SDmitry Rokosov - const: hifi_pll 41*98872da6SDmitry Rokosov - const: xtal 42*98872da6SDmitry Rokosov 43*98872da6SDmitry Rokosovrequired: 44*98872da6SDmitry Rokosov - compatible 45*98872da6SDmitry Rokosov - '#clock-cells' 46*98872da6SDmitry Rokosov - reg 47*98872da6SDmitry Rokosov - clocks 48*98872da6SDmitry Rokosov - clock-names 49*98872da6SDmitry Rokosov 50*98872da6SDmitry RokosovadditionalProperties: false 51*98872da6SDmitry Rokosov 52*98872da6SDmitry Rokosovexamples: 53*98872da6SDmitry Rokosov - | 54*98872da6SDmitry Rokosov #include <dt-bindings/clock/amlogic,a1-pll-clkc.h> 55*98872da6SDmitry Rokosov apb { 56*98872da6SDmitry Rokosov #address-cells = <2>; 57*98872da6SDmitry Rokosov #size-cells = <2>; 58*98872da6SDmitry Rokosov 59*98872da6SDmitry Rokosov clock-controller@800 { 60*98872da6SDmitry Rokosov compatible = "amlogic,a1-peripherals-clkc"; 61*98872da6SDmitry Rokosov reg = <0 0x800 0 0x104>; 62*98872da6SDmitry Rokosov #clock-cells = <1>; 63*98872da6SDmitry Rokosov clocks = <&clkc_pll CLKID_FCLK_DIV2>, 64*98872da6SDmitry Rokosov <&clkc_pll CLKID_FCLK_DIV3>, 65*98872da6SDmitry Rokosov <&clkc_pll CLKID_FCLK_DIV5>, 66*98872da6SDmitry Rokosov <&clkc_pll CLKID_FCLK_DIV7>, 67*98872da6SDmitry Rokosov <&clkc_pll CLKID_HIFI_PLL>, 68*98872da6SDmitry Rokosov <&xtal>; 69*98872da6SDmitry Rokosov clock-names = "fclk_div2", "fclk_div3", 70*98872da6SDmitry Rokosov "fclk_div5", "fclk_div7", 71*98872da6SDmitry Rokosov "hifi_pll", "xtal"; 72*98872da6SDmitry Rokosov }; 73*98872da6SDmitry Rokosov }; 74