1f95cad74SMaxime Ripard# SPDX-License-Identifier: GPL-2.0
2f95cad74SMaxime Ripard%YAML 1.2
3f95cad74SMaxime Ripard---
4f95cad74SMaxime Ripard$id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml#
5f95cad74SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml#
6f95cad74SMaxime Ripard
7*dd3cb467SAndrew Lunntitle: Allwinner A80 MMC Configuration Clock
8f95cad74SMaxime Ripard
9f95cad74SMaxime Ripardmaintainers:
10f95cad74SMaxime Ripard  - Chen-Yu Tsai <wens@csie.org>
11f95cad74SMaxime Ripard  - Maxime Ripard <mripard@kernel.org>
12f95cad74SMaxime Ripard
13f95cad74SMaxime Riparddeprecated: true
14f95cad74SMaxime Ripard
15f95cad74SMaxime Riparddescription: >
16f95cad74SMaxime Ripard  There is one clock/reset output per mmc controller. The number of
17f95cad74SMaxime Ripard  outputs is determined by the size of the address block, which is
18f95cad74SMaxime Ripard  related to the overall mmc block.
19f95cad74SMaxime Ripard
20f95cad74SMaxime Ripardproperties:
21f95cad74SMaxime Ripard  "#clock-cells":
22f95cad74SMaxime Ripard    const: 1
23f95cad74SMaxime Ripard    description: >
24f95cad74SMaxime Ripard      The additional ID argument passed to the clock shall refer to
25f95cad74SMaxime Ripard      the index of the output.
26f95cad74SMaxime Ripard
27f95cad74SMaxime Ripard  "#reset-cells":
28f95cad74SMaxime Ripard    const: 1
29f95cad74SMaxime Ripard
30f95cad74SMaxime Ripard  compatible:
31f95cad74SMaxime Ripard    const: allwinner,sun9i-a80-mmc-config-clk
32f95cad74SMaxime Ripard
33f95cad74SMaxime Ripard  reg:
34f95cad74SMaxime Ripard    maxItems: 1
35f95cad74SMaxime Ripard
36f95cad74SMaxime Ripard  clocks:
37f95cad74SMaxime Ripard    maxItems: 1
38f95cad74SMaxime Ripard
39f95cad74SMaxime Ripard  resets:
40f95cad74SMaxime Ripard    maxItems: 1
41f95cad74SMaxime Ripard
42f95cad74SMaxime Ripard  clock-output-names:
43f95cad74SMaxime Ripard    maxItems: 4
44f95cad74SMaxime Ripard
45f95cad74SMaxime Ripardrequired:
46f95cad74SMaxime Ripard  - "#clock-cells"
47f95cad74SMaxime Ripard  - "#reset-cells"
48f95cad74SMaxime Ripard  - compatible
49f95cad74SMaxime Ripard  - reg
50f95cad74SMaxime Ripard  - clocks
51f95cad74SMaxime Ripard  - clock-output-names
52f95cad74SMaxime Ripard
53f95cad74SMaxime RipardadditionalProperties: false
54f95cad74SMaxime Ripard
55f95cad74SMaxime Ripardexamples:
56f95cad74SMaxime Ripard  - |
57f95cad74SMaxime Ripard    clk@1c13000 {
58f95cad74SMaxime Ripard        #clock-cells = <1>;
59f95cad74SMaxime Ripard        #reset-cells = <1>;
60f95cad74SMaxime Ripard        compatible = "allwinner,sun9i-a80-mmc-config-clk";
61f95cad74SMaxime Ripard        reg = <0x01c13000 0x10>;
62f95cad74SMaxime Ripard        clocks = <&ahb0_gates 8>;
63f95cad74SMaxime Ripard        resets = <&ahb0_resets 8>;
64f95cad74SMaxime Ripard        clock-output-names = "mmc0_config", "mmc1_config",
65f95cad74SMaxime Ripard                             "mmc2_config", "mmc3_config";
66f95cad74SMaxime Ripard    };
67f95cad74SMaxime Ripard
68f95cad74SMaxime Ripard...
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