1f95cad74SMaxime Ripard# SPDX-License-Identifier: GPL-2.0 2f95cad74SMaxime Ripard%YAML 1.2 3f95cad74SMaxime Ripard--- 4f95cad74SMaxime Ripard$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-display-clk.yaml# 5f95cad74SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 6f95cad74SMaxime Ripard 7*dd3cb467SAndrew Lunntitle: Allwinner A10 Display Clock 8f95cad74SMaxime Ripard 9f95cad74SMaxime Ripardmaintainers: 10f95cad74SMaxime Ripard - Chen-Yu Tsai <wens@csie.org> 11f95cad74SMaxime Ripard - Maxime Ripard <mripard@kernel.org> 12f95cad74SMaxime Ripard 13f95cad74SMaxime Riparddeprecated: true 14f95cad74SMaxime Ripard 15f95cad74SMaxime Ripardproperties: 16f95cad74SMaxime Ripard "#clock-cells": 17f95cad74SMaxime Ripard const: 0 18f95cad74SMaxime Ripard 19f95cad74SMaxime Ripard "#reset-cells": 20f95cad74SMaxime Ripard const: 0 21f95cad74SMaxime Ripard 22f95cad74SMaxime Ripard compatible: 23f95cad74SMaxime Ripard const: allwinner,sun4i-a10-display-clk 24f95cad74SMaxime Ripard 25f95cad74SMaxime Ripard reg: 26f95cad74SMaxime Ripard maxItems: 1 27f95cad74SMaxime Ripard 28f95cad74SMaxime Ripard clocks: 29f95cad74SMaxime Ripard maxItems: 3 30f95cad74SMaxime Ripard description: > 31f95cad74SMaxime Ripard The parent order must match the hardware programming order. 32f95cad74SMaxime Ripard 33f95cad74SMaxime Ripard clock-output-names: 34f95cad74SMaxime Ripard maxItems: 1 35f95cad74SMaxime Ripard 36f95cad74SMaxime Ripardrequired: 37f95cad74SMaxime Ripard - "#clock-cells" 38f95cad74SMaxime Ripard - "#reset-cells" 39f95cad74SMaxime Ripard - compatible 40f95cad74SMaxime Ripard - reg 41f95cad74SMaxime Ripard - clocks 42f95cad74SMaxime Ripard - clock-output-names 43f95cad74SMaxime Ripard 44f95cad74SMaxime RipardadditionalProperties: false 45f95cad74SMaxime Ripard 46f95cad74SMaxime Ripardexamples: 47f95cad74SMaxime Ripard - | 48f95cad74SMaxime Ripard clk@1c20104 { 49f95cad74SMaxime Ripard #clock-cells = <0>; 50f95cad74SMaxime Ripard #reset-cells = <0>; 51f95cad74SMaxime Ripard compatible = "allwinner,sun4i-a10-display-clk"; 52f95cad74SMaxime Ripard reg = <0x01c20104 0x4>; 53f95cad74SMaxime Ripard clocks = <&pll3>, <&pll7>, <&pll5 1>; 54f95cad74SMaxime Ripard clock-output-names = "de-be"; 55f95cad74SMaxime Ripard }; 56f95cad74SMaxime Ripard 57f95cad74SMaxime Ripard... 58