1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/bus/nvidia,tegra210-aconnect.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra ACONNECT Bus
8
9description: |
10  The Tegra ACONNECT bus is an AXI switch which is used to connnect various
11  components inside the Audio Processing Engine (APE). All CPU accesses to
12  the APE subsystem go through the ACONNECT via an APB to AXI wrapper. All
13  devices accessed via the ACONNNECT are described by child-nodes.
14
15maintainers:
16  - Jon Hunter <jonathanh@nvidia.com>
17
18properties:
19  compatible:
20    oneOf:
21      - const: nvidia,tegra210-aconnect
22      - items:
23          - enum:
24              - nvidia,tegra186-aconnect
25              - nvidia,tegra194-aconnect
26          - const: nvidia,tegra210-aconnect
27
28  clocks:
29    items:
30      - description: Must contain the entry for APE clock
31      - description: Must contain the entry for APE interface clock
32
33  clock-names:
34    items:
35      - const: ape
36      - const: apb2ape
37
38  power-domains:
39    maxItems: 1
40
41  "#address-cells":
42    const: 1
43
44  "#size-cells":
45    const: 1
46
47  ranges: true
48
49patternProperties:
50  "@[0-9a-f]+$":
51    type: object
52
53required:
54  - compatible
55  - clocks
56  - clock-names
57  - power-domains
58  - "#address-cells"
59  - "#size-cells"
60  - ranges
61
62additionalProperties: false
63
64examples:
65  - |
66    #include<dt-bindings/clock/tegra210-car.h>
67
68    aconnect@702c0000 {
69        compatible = "nvidia,tegra210-aconnect";
70        clocks = <&tegra_car TEGRA210_CLK_APE>,
71                 <&tegra_car TEGRA210_CLK_APB2APE>;
72        clock-names = "ape", "apb2ape";
73        power-domains = <&pd_audio>;
74
75        #address-cells = <1>;
76        #size-cells = <1>;
77        ranges = <0x702c0000 0x702c0000 0x00040000>;
78
79        // Child device nodes follow ...
80    };
81
82...
83