1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/bus/brcm,gisb-arb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Broadcom GISB bus Arbiter controller
8
9maintainers:
10  - Florian Fainelli <f.fainelli@gmail.com>
11
12properties:
13  compatible:
14    oneOf:
15      - items:
16          - enum:
17              - brcm,bcm7445-gisb-arb  # for other 28nm chips
18          - const: brcm,gisb-arb
19      - items:
20          - enum:
21              - brcm,bcm7278-gisb-arb  # for V7 28nm chips
22              - brcm,bcm7435-gisb-arb  # for newer 40nm chips
23              - brcm,bcm7400-gisb-arb  # for older 40nm chips and all 65nm chips
24              - brcm,bcm7038-gisb-arb  # for 130nm chips
25              - brcm,gisb-arb          # fallback compatible
26
27  reg:
28    maxItems: 1
29
30  interrupts:
31    minItems: 2
32    items:
33      - description: timeout interrupt line
34      - description: target abort interrupt line
35      - description: breakpoint interrupt line
36
37  brcm,gisb-arb-master-mask:
38    $ref: /schemas/types.yaml#/definitions/uint32
39    description: >
40      32-bits wide bitmask used to specify which GISB masters are valid at the
41      system level
42
43  brcm,gisb-arb-master-names:
44    $ref: /schemas/types.yaml#/definitions/string-array
45    description: >
46      String list of the literal name of the GISB masters. Should match the
47      number of bits set in brcm,gisb-master-mask and the order in which they
48      appear from MSB to LSB.
49
50required:
51  - compatible
52  - reg
53  - interrupts
54
55additionalProperties: false
56
57examples:
58  - |
59    gisb-arb@f0400000 {
60      compatible = "brcm,gisb-arb";
61      reg = <0xf0400000 0x800>;
62      interrupts = <0>, <2>;
63      interrupt-parent = <&sun_l2_intc>;
64      brcm,gisb-arb-master-mask = <0x7>;
65      brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0";
66    };
67