1STMicroelectronics STi SATA controller
2
3This binding describes a SATA device.
4
5Required properties:
6 - compatible	   : Must be "st,ahci"
7 - reg		   : Physical base addresses and length of register sets
8 - interrupts	   : Interrupt associated with the SATA device
9 - interrupt-names :   Associated name must be; "hostc"
10 - clocks	   : The phandle for the clock
11 - clock-names	   :   Associated name must be; "ahci_clk"
12 - phys		   : The phandle for the PHY port
13 - phy-names	   :   Associated name must be; "ahci_phy"
14
15Optional properties:
16 - resets	   : The power-down, soft-reset and power-reset lines of SATA IP
17 - reset-names	   :   Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
18
19Example:
20
21	/* Example for stih416 */
22	sata0: sata@fe380000 {
23		compatible	= "st,ahci";
24		reg		= <0xfe380000 0x1000>;
25		interrupts	= <GIC_SPI 157 IRQ_TYPE_NONE>;
26		interrupt-names	= "hostc";
27		phys		= <&phy_port0 PHY_TYPE_SATA>;
28		phy-names	= "ahci_phy";
29		resets		= <&powerdown STIH416_SATA0_POWERDOWN>,
30				  <&softreset STIH416_SATA0_SOFTRESET>;
31		reset-names	= "pwr-dwn", "sw-rst";
32		clocks		= <&clk_s_a0_ls CLK_ICN_REG>;
33		clock-names	= "ahci_clk";
34	};
35
36	/* Example for stih407 family silicon */
37	sata0: sata@9b20000 {
38		compatible	= "st,ahci";
39		reg		= <0x9b20000 0x1000>;
40		interrupts	= <GIC_SPI 159 IRQ_TYPE_NONE>;
41		interrupt-names	= "hostc";
42		phys		= <&phy_port0 PHY_TYPE_SATA>;
43		phy-names	= "ahci_phy";
44		resets		= <&powerdown STIH407_SATA0_POWERDOWN>,
45				  <&softreset STIH407_SATA0_SOFTRESET>,
46				  <&softreset STIH407_SATA0_PWR_SOFTRESET>;
47		reset-names	= "pwr-dwn", "sw-rst", "pwr-rst";
48		clocks		= <&clk_s_c0_flexgen CLK_ICN_REG>;
49		clock-names	= "ahci_clk";
50	};
51