1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ata/ahci-common.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Common Properties for Serial ATA AHCI controllers
8
9maintainers:
10  - Hans de Goede <hdegoede@redhat.com>
11  - Damien Le Moal <damien.lemoal@opensource.wdc.com>
12
13description:
14  This document defines device tree properties for a common AHCI SATA
15  controller implementation. It's hardware interface is supposed to
16  conform to the technical standard defined by Intel (see Serial ATA
17  Advanced Host Controller Interface specification for details). The
18  document doesn't constitute a DT-node binding by itself but merely
19  defines a set of common properties for the AHCI-compatible devices.
20
21select: false
22
23allOf:
24  - $ref: sata-common.yaml#
25
26properties:
27  reg:
28    description:
29      Generic AHCI registers space conforming to the Serial ATA AHCI
30      specification.
31
32  reg-names:
33    description: CSR space IDs
34    contains:
35      const: ahci
36
37  interrupts:
38    description:
39      Generic AHCI state change interrupt. Can be implemented either as a
40      single line attached to the controller or as a set of the signals
41      indicating the particular port events.
42    minItems: 1
43    maxItems: 32
44
45  ahci-supply:
46    description: Power regulator for AHCI controller
47
48  target-supply:
49    description: Power regulator for SATA target device
50
51  phy-supply:
52    description: Power regulator for SATA PHY
53
54  phys:
55    description: Reference to the SATA PHY node
56    maxItems: 1
57
58  phy-names:
59    const: sata-phy
60
61  ports-implemented:
62    $ref: '/schemas/types.yaml#/definitions/uint32'
63    description:
64      Mask that indicates which ports the HBA supports. Useful if PI is not
65      programmed by the BIOS, which is true for some embedded SoC's.
66
67patternProperties:
68  "^sata-port@[0-9a-f]+$":
69    $ref: '#/$defs/ahci-port'
70    description:
71      It is optionally possible to describe the ports as sub-nodes so
72      to enable each port independently when dealing with multiple PHYs.
73
74required:
75  - reg
76  - interrupts
77
78additionalProperties: true
79
80$defs:
81  ahci-port:
82    $ref: /schemas/ata/sata-common.yaml#/$defs/sata-port
83
84    properties:
85      reg:
86        description:
87          AHCI SATA port identifier. By design AHCI controller can't have
88          more than 32 ports due to the CAP.NP fields and PI register size
89          constraints.
90        minimum: 0
91        maximum: 31
92
93      phys:
94        description: Individual AHCI SATA port PHY
95        maxItems: 1
96
97      phy-names:
98        description: AHCI SATA port PHY ID
99        const: sata-phy
100
101      target-supply:
102        description: Power regulator for SATA port target device
103
104    required:
105      - reg
106
107...
108