1OMAP Control Module bindings
2
3Control Module contains miscellaneous features under it based on SoC type.
4Pincontrol is one common feature, and it has a specialized support
5described in [1]. Typically some clock nodes are also under control module.
6Syscon is used to share register level access to drivers external to
7control module driver itself.
8
9See [2] for documentation about clock/clockdomain nodes.
10
11[1] Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt
12[2] Documentation/devicetree/bindings/clock/ti/*
13
14Required properties:
15- compatible:	Must be one of:
16		"ti,am3-scm"
17		"ti,am4-scm"
18		"ti,dm814-scrm"
19		"ti,dm816-scrm"
20		"ti,omap2-scm"
21		"ti,omap3-scm"
22		"ti,omap4-scm-core"
23		"ti,omap4-scm-padconf-core"
24		"ti,omap4-scm-wkup"
25		"ti,omap4-scm-padconf-wkup"
26		"ti,omap5-scm-core"
27		"ti,omap5-scm-padconf-core"
28		"ti,dra7-scm-core"
29- reg:		Contains Control Module register address range
30		(base address and length)
31
32Optional properties:
33- clocks:	clocks for this module
34- clockdomains:	clockdomains for this module
35
36Examples:
37
38scm: scm@2000 {
39	compatible = "ti,omap3-scm", "simple-bus";
40	reg = <0x2000 0x2000>;
41	#address-cells = <1>;
42	#size-cells = <1>;
43	ranges = <0 0x2000 0x2000>;
44
45	omap3_pmx_core: pinmux@30 {
46		compatible = "ti,omap3-padconf",
47			     "pinctrl-single";
48		reg = <0x30 0x230>;
49		#address-cells = <1>;
50		#size-cells = <0>;
51		#interrupt-cells = <1>;
52		interrupt-controller;
53		pinctrl-single,register-width = <16>;
54		pinctrl-single,function-mask = <0xff1f>;
55	};
56
57	scm_conf: scm_conf@270 {
58		compatible = "syscon";
59		reg = <0x270 0x330>;
60		#address-cells = <1>;
61		#size-cells = <1>;
62
63		scm_clocks: clocks {
64			#address-cells = <1>;
65			#size-cells = <0>;
66		};
67	};
68
69	scm_clockdomains: clockdomains {
70	};
71}
72
73&scm_clocks {
74	mcbsp5_mux_fck: mcbsp5_mux_fck {
75		#clock-cells = <0>;
76		compatible = "ti,composite-mux-clock";
77		clocks = <&core_96m_fck>, <&mcbsp_clks>;
78		ti,bit-shift = <4>;
79		reg = <0x02d8>;
80	};
81};
82