xref: /openbmc/linux/Documentation/devicetree/bindings/arm/mstar/mstar,smpctrl.yaml (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
180e73332SDaniel Palmer# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
280e73332SDaniel Palmer# Copyright 2020 thingy.jp.
380e73332SDaniel Palmer%YAML 1.2
480e73332SDaniel Palmer---
5*45698208SRob Herring$id: http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml#
6*45698208SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml#
780e73332SDaniel Palmer
880e73332SDaniel Palmertitle: MStar/SigmaStar Armv7 SoC SMP control registers
980e73332SDaniel Palmer
1080e73332SDaniel Palmermaintainers:
1180e73332SDaniel Palmer  - Daniel Palmer <daniel@thingy.jp>
1280e73332SDaniel Palmer
1380e73332SDaniel Palmerdescription: |
1480e73332SDaniel Palmer  MStar/SigmaStar's Armv7 SoCs that have more than one processor
1580e73332SDaniel Palmer  have a region of registers that allow setting the boot address
1680e73332SDaniel Palmer  and a magic number that allows secondary processors to leave
1780e73332SDaniel Palmer  the loop they are parked in by the boot ROM.
1880e73332SDaniel Palmer
1980e73332SDaniel Palmerproperties:
2080e73332SDaniel Palmer  compatible:
2180e73332SDaniel Palmer    items:
2280e73332SDaniel Palmer      - enum:
2380e73332SDaniel Palmer          - sstar,ssd201-smpctrl # SSD201/SSD202D
2480e73332SDaniel Palmer      - const: mstar,smpctrl
2580e73332SDaniel Palmer
2680e73332SDaniel Palmer  reg:
2780e73332SDaniel Palmer    maxItems: 1
2880e73332SDaniel Palmer
2980e73332SDaniel Palmerrequired:
3080e73332SDaniel Palmer  - compatible
3180e73332SDaniel Palmer  - reg
3280e73332SDaniel Palmer
3380e73332SDaniel PalmeradditionalProperties: false
3480e73332SDaniel Palmer
3580e73332SDaniel Palmerexamples:
3680e73332SDaniel Palmer  - |
3780e73332SDaniel Palmer    smpctrl@204000 {
3880e73332SDaniel Palmer        compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl";
3980e73332SDaniel Palmer        reg = <0x204000 0x200>;
4080e73332SDaniel Palmer    };
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