1*80e73332SDaniel Palmer# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*80e73332SDaniel Palmer# Copyright 2020 thingy.jp. 3*80e73332SDaniel Palmer%YAML 1.2 4*80e73332SDaniel Palmer--- 5*80e73332SDaniel Palmer$id: "http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml#" 6*80e73332SDaniel Palmer$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7*80e73332SDaniel Palmer 8*80e73332SDaniel Palmertitle: MStar/SigmaStar Armv7 SoC SMP control registers 9*80e73332SDaniel Palmer 10*80e73332SDaniel Palmermaintainers: 11*80e73332SDaniel Palmer - Daniel Palmer <daniel@thingy.jp> 12*80e73332SDaniel Palmer 13*80e73332SDaniel Palmerdescription: | 14*80e73332SDaniel Palmer MStar/SigmaStar's Armv7 SoCs that have more than one processor 15*80e73332SDaniel Palmer have a region of registers that allow setting the boot address 16*80e73332SDaniel Palmer and a magic number that allows secondary processors to leave 17*80e73332SDaniel Palmer the loop they are parked in by the boot ROM. 18*80e73332SDaniel Palmer 19*80e73332SDaniel Palmerproperties: 20*80e73332SDaniel Palmer compatible: 21*80e73332SDaniel Palmer items: 22*80e73332SDaniel Palmer - enum: 23*80e73332SDaniel Palmer - sstar,ssd201-smpctrl # SSD201/SSD202D 24*80e73332SDaniel Palmer - const: mstar,smpctrl 25*80e73332SDaniel Palmer 26*80e73332SDaniel Palmer reg: 27*80e73332SDaniel Palmer maxItems: 1 28*80e73332SDaniel Palmer 29*80e73332SDaniel Palmerrequired: 30*80e73332SDaniel Palmer - compatible 31*80e73332SDaniel Palmer - reg 32*80e73332SDaniel Palmer 33*80e73332SDaniel PalmeradditionalProperties: false 34*80e73332SDaniel Palmer 35*80e73332SDaniel Palmerexamples: 36*80e73332SDaniel Palmer - | 37*80e73332SDaniel Palmer smpctrl@204000 { 38*80e73332SDaniel Palmer compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl"; 39*80e73332SDaniel Palmer reg = <0x204000 0x200>; 40*80e73332SDaniel Palmer }; 41