1MediaTek PCIESYS controller
2============================
3
4The MediaTek PCIESYS controller provides various clocks to the system.
5
6Required Properties:
7
8- compatible: Should be:
9	- "mediatek,mt7622-pciesys", "syscon"
10	- "mediatek,mt7629-pciesys", "syscon"
11- #clock-cells: Must be 1
12- #reset-cells: Must be 1
13
14The PCIESYS controller uses the common clk binding from
15Documentation/devicetree/bindings/clock/clock-bindings.txt
16The available clocks are defined in dt-bindings/clock/mt*-clk.h.
17
18Example:
19
20pciesys: pciesys@1a100800 {
21	compatible = "mediatek,mt7622-pciesys", "syscon";
22	reg = <0 0x1a100800 0 0x1000>;
23	#clock-cells = <1>;
24	#reset-cells = <1>;
25};
26