1MediaTek PCIESYS controller
2============================
3
4The MediaTek PCIESYS controller provides various clocks to the system.
5
6Required Properties:
7
8- compatible: Should be:
9	- "mediatek,mt7622-pciesys", "syscon"
10- #clock-cells: Must be 1
11- #reset-cells: Must be 1
12
13The PCIESYS controller uses the common clk binding from
14Documentation/devicetree/bindings/clock/clock-bindings.txt
15The available clocks are defined in dt-bindings/clock/mt*-clk.h.
16
17Example:
18
19pciesys: pciesys@1a100800 {
20	compatible = "mediatek,mt7622-pciesys", "syscon";
21	reg = <0 0x1a100800 0 0x1000>;
22	#clock-cells = <1>;
23	#reset-cells = <1>;
24};
25