1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: MediaTek Wireless Ethernet Dispatch Controller for MT7622 8 9maintainers: 10 - Lorenzo Bianconi <lorenzo@kernel.org> 11 - Felix Fietkau <nbd@nbd.name> 12 13description: 14 The mediatek wireless ethernet dispatch controller can be configured to 15 intercept and handle access to the WLAN DMA queues and PCIe interrupts 16 and implement hardware flow offloading from ethernet to WLAN. 17 18properties: 19 compatible: 20 items: 21 - enum: 22 - mediatek,mt7622-wed 23 - mediatek,mt7986-wed 24 - const: syscon 25 26 reg: 27 maxItems: 1 28 29 interrupts: 30 maxItems: 1 31 32 memory-region: 33 items: 34 - description: firmware EMI region 35 - description: firmware ILM region 36 - description: firmware DLM region 37 - description: firmware CPU DATA region 38 - description: firmware BOOT region 39 40 memory-region-names: 41 items: 42 - const: wo-emi 43 - const: wo-ilm 44 - const: wo-dlm 45 - const: wo-data 46 - const: wo-boot 47 48 mediatek,wo-ccif: 49 $ref: /schemas/types.yaml#/definitions/phandle 50 description: mediatek wed-wo controller interface. 51 52allOf: 53 - if: 54 properties: 55 compatible: 56 contains: 57 const: mediatek,mt7622-wed 58 then: 59 properties: 60 memory-region-names: false 61 memory-region: false 62 mediatek,wo-ccif: false 63 64required: 65 - compatible 66 - reg 67 - interrupts 68 69additionalProperties: false 70 71examples: 72 - | 73 #include <dt-bindings/interrupt-controller/arm-gic.h> 74 #include <dt-bindings/interrupt-controller/irq.h> 75 soc { 76 #address-cells = <2>; 77 #size-cells = <2>; 78 wed0: wed@1020a000 { 79 compatible = "mediatek,mt7622-wed","syscon"; 80 reg = <0 0x1020a000 0 0x1000>; 81 interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>; 82 }; 83 }; 84 85 - | 86 #include <dt-bindings/interrupt-controller/arm-gic.h> 87 #include <dt-bindings/interrupt-controller/irq.h> 88 soc { 89 #address-cells = <2>; 90 #size-cells = <2>; 91 92 wed@15010000 { 93 compatible = "mediatek,mt7986-wed", "syscon"; 94 reg = <0 0x15010000 0 0x1000>; 95 interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; 96 97 memory-region = <&wo_emi>, <&wo_ilm>, <&wo_dlm>, 98 <&wo_data>, <&wo_boot>; 99 memory-region-names = "wo-emi", "wo-ilm", "wo-dlm", 100 "wo-data", "wo-boot"; 101 mediatek,wo-ccif = <&wo_ccif0>; 102 }; 103 }; 104