1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,infracfg.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: MediaTek Infrastructure System Configuration Controller
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12description:
13  The Mediatek infracfg controller provides various clocks and reset outputs
14  to the system. The clock values can be found in <dt-bindings/clock/mt*-clk.h>,
15  and reset values in <dt-bindings/reset/mt*-reset.h> and
16  <dt-bindings/reset/mt*-resets.h>.
17
18properties:
19  compatible:
20    oneOf:
21      - items:
22          - enum:
23              - mediatek,mt2701-infracfg
24              - mediatek,mt2712-infracfg
25              - mediatek,mt6765-infracfg
26              - mediatek,mt6795-infracfg
27              - mediatek,mt6779-infracfg_ao
28              - mediatek,mt6797-infracfg
29              - mediatek,mt7622-infracfg
30              - mediatek,mt7629-infracfg
31              - mediatek,mt7986-infracfg
32              - mediatek,mt8135-infracfg
33              - mediatek,mt8167-infracfg
34              - mediatek,mt8173-infracfg
35              - mediatek,mt8183-infracfg
36              - mediatek,mt8516-infracfg
37          - const: syscon
38      - items:
39          - const: mediatek,mt7623-infracfg
40          - const: mediatek,mt2701-infracfg
41          - const: syscon
42
43  reg:
44    maxItems: 1
45
46  '#clock-cells':
47    const: 1
48
49  '#reset-cells':
50    const: 1
51
52required:
53  - compatible
54  - reg
55  - '#clock-cells'
56
57if:
58  properties:
59    compatible:
60      contains:
61        enum:
62          - mediatek,mt2701-infracfg
63          - mediatek,mt2712-infracfg
64          - mediatek,mt6795-infracfg
65          - mediatek,mt7622-infracfg
66          - mediatek,mt7986-infracfg
67          - mediatek,mt8135-infracfg
68          - mediatek,mt8173-infracfg
69          - mediatek,mt8183-infracfg
70then:
71  required:
72    - '#reset-cells'
73
74additionalProperties: false
75
76examples:
77  - |
78    infracfg: clock-controller@10001000 {
79        compatible = "mediatek,mt8173-infracfg", "syscon";
80        reg = <0x10001000 0x1000>;
81        #clock-cells = <1>;
82        #reset-cells = <1>;
83    };
84