123a71fd6SScott BrandenBroadcom BCM63138 DSL System-on-a-Chip device tree bindings 223a71fd6SScott Branden----------------------------------------------------------- 323a71fd6SScott Branden 423a71fd6SScott BrandenBoards compatible with the BCM63138 DSL System-on-a-Chip should have the 523a71fd6SScott Brandenfollowing properties: 623a71fd6SScott Branden 723a71fd6SScott BrandenRequired root node property: 823a71fd6SScott Branden 923a71fd6SScott Brandencompatible: should be "brcm,bcm63138" 10a4cdbb96SFlorian Fainelli 11a4cdbb96SFlorian FainelliAn optional Boot lookup table Device Tree node is required for secondary CPU 12a4cdbb96SFlorian Fainelliinitialization as well as a 'resets' phandle to the correct PMB controller as 13a4cdbb96SFlorian Fainellidefined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an 14a4cdbb96SFlorian Fainelli'enable-method' property. 15a4cdbb96SFlorian Fainelli 16a4cdbb96SFlorian FainelliRequired properties for the Boot lookup table node: 17a4cdbb96SFlorian Fainelli- compatible: should be "brcm,bcm63138-bootlut" 18a4cdbb96SFlorian Fainelli- reg: register base address and length for the Boot Lookup table 19a4cdbb96SFlorian Fainelli 20a4cdbb96SFlorian FainelliOptional properties for the primary CPU node: 21a4cdbb96SFlorian Fainelli- enable-method: should be "brcm,bcm63138" 22a4cdbb96SFlorian Fainelli 23a4cdbb96SFlorian FainelliOptional properties for the secondary CPU node: 24a4cdbb96SFlorian Fainelli- enable-method: should be "brcm,bcm63138" 25a4cdbb96SFlorian Fainelli- resets: phandle to the relevant PMB controller, one integer indicating the internal 26a4cdbb96SFlorian Fainelli bus number, and a second integer indicating the address of the CPU in the PMB 27a4cdbb96SFlorian Fainelli internal bus number. 28a4cdbb96SFlorian Fainelli 29a4cdbb96SFlorian FainelliExample: 30a4cdbb96SFlorian Fainelli 31a4cdbb96SFlorian Fainelli cpus { 32a4cdbb96SFlorian Fainelli cpu@0 { 33a4cdbb96SFlorian Fainelli compatible = "arm,cotex-a9"; 34a4cdbb96SFlorian Fainelli reg = <0>; 35a4cdbb96SFlorian Fainelli ... 36a4cdbb96SFlorian Fainelli enable-method = "brcm,bcm63138"; 37a4cdbb96SFlorian Fainelli }; 38a4cdbb96SFlorian Fainelli 39a4cdbb96SFlorian Fainelli cpu@1 { 40a4cdbb96SFlorian Fainelli compatible = "arm,cortex-a9"; 41a4cdbb96SFlorian Fainelli reg = <1>; 42a4cdbb96SFlorian Fainelli ... 43a4cdbb96SFlorian Fainelli enable-method = "brcm,bcm63138"; 44a4cdbb96SFlorian Fainelli resets = <&pmb0 4 1>; 45a4cdbb96SFlorian Fainelli }; 46a4cdbb96SFlorian Fainelli }; 47a4cdbb96SFlorian Fainelli 48a4cdbb96SFlorian Fainelli bootlut: bootlut@8000 { 49a4cdbb96SFlorian Fainelli compatible = "brcm,bcm63138-bootlut"; 50a4cdbb96SFlorian Fainelli reg = <0x8000 0x50>; 51a4cdbb96SFlorian Fainelli }; 52ac61cf8aSFlorian Fainelli 53ac61cf8aSFlorian Fainelli======= 54ac61cf8aSFlorian Fainellireboot 55ac61cf8aSFlorian Fainelli------ 56ac61cf8aSFlorian FainelliTwo nodes are required for software reboot: a timer node and a syscon-reboot node. 57ac61cf8aSFlorian Fainelli 58ac61cf8aSFlorian FainelliTimer node: 59ac61cf8aSFlorian Fainelli 60ac61cf8aSFlorian Fainelli- compatible: Must be "brcm,bcm6328-timer", "syscon" 61ac61cf8aSFlorian Fainelli- reg: Register base address and length 62ac61cf8aSFlorian Fainelli 63ac61cf8aSFlorian FainelliSyscon reboot node: 64ac61cf8aSFlorian Fainelli 6554b3719dSMauro Carvalho ChehabSee Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml for the 66ac61cf8aSFlorian Fainellidetailed list of properties, the two values defined below are specific to the 67ac61cf8aSFlorian FainelliBCM6328-style timer: 68ac61cf8aSFlorian Fainelli 69ac61cf8aSFlorian Fainelli- offset: Should be 0x34 to denote the offset of the TIMER_WD_TIMER_RESET register 70ac61cf8aSFlorian Fainelli from the beginning of the TIMER block 71ac61cf8aSFlorian Fainelli- mask: Should be 1 for the SoftRst bit. 72ac61cf8aSFlorian Fainelli 73ac61cf8aSFlorian FainelliExample: 74ac61cf8aSFlorian Fainelli 75ac61cf8aSFlorian Fainelli timer: timer@80 { 76ac61cf8aSFlorian Fainelli compatible = "brcm,bcm6328-timer", "syscon"; 77ac61cf8aSFlorian Fainelli reg = <0x80 0x3c>; 78ac61cf8aSFlorian Fainelli }; 79ac61cf8aSFlorian Fainelli 80ac61cf8aSFlorian Fainelli reboot { 81ac61cf8aSFlorian Fainelli compatible = "syscon-reboot"; 82ac61cf8aSFlorian Fainelli regmap = <&timer>; 83ac61cf8aSFlorian Fainelli offset = <0x34>; 84ac61cf8aSFlorian Fainelli mask = <0x1>; 85ac61cf8aSFlorian Fainelli }; 86