1Atmel system registers
2
3Chipid required properties:
4- compatible: Should be "atmel,sama5d2-chipid"
5- reg : Should contain registers location and length
6
7PIT Timer required properties:
8- compatible: Should be "atmel,at91sam9260-pit"
9- reg: Should contain registers location and length
10- interrupts: Should contain interrupt for the PIT which is the IRQ line
11  shared across all System Controller members.
12
13System Timer (ST) required properties:
14- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
15- reg: Should contain registers location and length
16- interrupts: Should contain interrupt for the ST which is the IRQ line
17  shared across all System Controller members.
18- clocks: phandle to input clock.
19Its subnodes can be:
20- watchdog: compatible should be "atmel,at91rm9200-wdt"
21
22RSTC Reset Controller required properties:
23- compatible: Should be "atmel,<chip>-rstc".
24  <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
25- reg: Should contain registers location and length
26- clocks: phandle to input clock.
27
28Example:
29
30	rstc@fffffd00 {
31		compatible = "atmel,at91sam9260-rstc";
32		reg = <0xfffffd00 0x10>;
33		clocks = <&clk32k>;
34	};
35
36RAMC SDRAM/DDR Controller required properties:
37- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
38			"atmel,at91sam9260-sdramc",
39			"atmel,at91sam9g45-ddramc",
40			"atmel,sama5d3-ddramc",
41- reg: Should contain registers location and length
42
43Examples:
44
45	ramc0: ramc@ffffe800 {
46		compatible = "atmel,at91sam9g45-ddramc";
47		reg = <0xffffe800 0x200>;
48	};
49
50SHDWC Shutdown Controller
51
52required properties:
53- compatible: Should be "atmel,<chip>-shdwc".
54  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
55- reg: Should contain registers location and length
56- clocks: phandle to input clock.
57
58optional properties:
59- atmel,wakeup-mode: String, operation mode of the wakeup mode.
60  Supported values are: "none", "high", "low", "any".
61- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
62
63optional at91sam9260 properties:
64- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
65
66optional at91sam9rl properties:
67- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
68- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
69
70optional at91sam9x5 properties:
71- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
72
73Example:
74
75	shdwc@fffffd10 {
76		compatible = "atmel,at91sam9260-shdwc";
77		reg = <0xfffffd10 0x10>;
78		clocks = <&clk32k>;
79	};
80
81SHDWC SAMA5D2-Compatible Shutdown Controller
82
831) shdwc node
84
85required properties:
86- compatible: should be "atmel,sama5d2-shdwc".
87- reg: should contain registers location and length
88- clocks: phandle to input clock.
89- #address-cells: should be one. The cell is the wake-up input index.
90- #size-cells: should be zero.
91
92optional properties:
93
94- debounce-delay-us: minimum wake-up inputs debouncer period in
95  microseconds. It's usually a board-related property.
96- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
97
98The node contains child nodes for each wake-up input that the platform uses.
99
1002) input nodes
101
102Wake-up input nodes are usually described in the "board" part of the Device
103Tree. Note also that input 0 is linked to the wake-up pin and is frequently
104used.
105
106Required properties:
107- reg: should contain the wake-up input index [0 - 15].
108
109Optional properties:
110- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
111  by the child, forces the wake-up of the core power supply on a high level.
112  The default is to be active low.
113
114Example:
115
116On the SoC side:
117	shdwc@f8048010 {
118		compatible = "atmel,sama5d2-shdwc";
119		reg = <0xf8048010 0x10>;
120		clocks = <&clk32k>;
121		#address-cells = <1>;
122		#size-cells = <0>;
123		atmel,wakeup-rtc-timer;
124	};
125
126On the board side:
127	shdwc@f8048010 {
128		debounce-delay-us = <976>;
129
130		input@0 {
131			reg = <0>;
132		};
133
134		input@1 {
135			reg = <1>;
136			atmel,wakeup-active-high;
137		};
138	};
139
140Special Function Registers (SFR)
141
142Special Function Registers (SFR) manage specific aspects of the integrated
143memory, bridge implementations, processor and other functionality not controlled
144elsewhere.
145
146required properties:
147- compatible: Should be "atmel,<chip>-sfr", "syscon" or
148	"atmel,<chip>-sfrbu", "syscon"
149  <chip> can be "sama5d3", "sama5d4" or "sama5d2".
150- reg: Should contain registers location and length
151
152	sfr@f0038000 {
153		compatible = "atmel,sama5d3-sfr", "syscon";
154		reg = <0xf0038000 0x60>;
155	};
156
157Security Module (SECUMOD)
158
159The Security Module macrocell provides all necessary secure functions to avoid
160voltage, temperature, frequency and mechanical attacks on the chip. It also
161embeds secure memories that can be scrambled
162
163required properties:
164- compatible: Should be "atmel,<chip>-secumod", "syscon".
165  <chip> can be "sama5d2".
166- reg: Should contain registers location and length
167
168	secumod@fc040000 {
169		compatible = "atmel,sama5d2-secumod", "syscon";
170		reg = <0xfc040000 0x100>;
171	};
172