1b31abcebSRob Herring# SPDX-License-Identifier: GPL-2.0 2b31abcebSRob Herring%YAML 1.2 3b31abcebSRob Herring--- 4b31abcebSRob Herring$id: http://devicetree.org/schemas/arm/altera/socfpga-clk-manager.yaml# 5b31abcebSRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml# 6b31abcebSRob Herring 7b31abcebSRob Herringtitle: Altera SOCFPGA Clock Manager 8b31abcebSRob Herring 9b31abcebSRob Herringmaintainers: 10b31abcebSRob Herring - Dinh Nguyen <dinguyen@kernel.org> 11b31abcebSRob Herring 12b31abcebSRob Herringdescription: test 13b31abcebSRob Herring 14b31abcebSRob Herringproperties: 15b31abcebSRob Herring compatible: 16b31abcebSRob Herring items: 17b31abcebSRob Herring - const: altr,clk-mgr 18b31abcebSRob Herring reg: 19b31abcebSRob Herring maxItems: 1 20b31abcebSRob Herring 21b31abcebSRob Herringrequired: 22b31abcebSRob Herring - compatible 23b31abcebSRob Herring 24b31abcebSRob Herringexamples: 25b31abcebSRob Herring - | 26b31abcebSRob Herring clkmgr@ffd04000 { 27b31abcebSRob Herring compatible = "altr,clk-mgr"; 28b31abcebSRob Herring reg = <0xffd04000 0x1000>; 29b31abcebSRob Herring }; 30b31abcebSRob Herring 31b31abcebSRob Herring... 32