1============== 2DMA attributes 3============== 4 5This document describes the semantics of the DMA attributes that are 6defined in linux/dma-mapping.h. 7 8DMA_ATTR_WEAK_ORDERING 9---------------------- 10 11DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping 12may be weakly ordered, that is that reads and writes may pass each other. 13 14Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING, 15those that do not will simply ignore the attribute and exhibit default 16behavior. 17 18DMA_ATTR_WRITE_COMBINE 19---------------------- 20 21DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be 22buffered to improve performance. 23 24Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE, 25those that do not will simply ignore the attribute and exhibit default 26behavior. 27 28DMA_ATTR_NO_KERNEL_MAPPING 29-------------------------- 30 31DMA_ATTR_NO_KERNEL_MAPPING lets the platform to avoid creating a kernel 32virtual mapping for the allocated buffer. On some architectures creating 33such mapping is non-trivial task and consumes very limited resources 34(like kernel virtual address space or dma consistent address space). 35Buffers allocated with this attribute can be only passed to user space 36by calling dma_mmap_attrs(). By using this API, you are guaranteeing 37that you won't dereference the pointer returned by dma_alloc_attr(). You 38can treat it as a cookie that must be passed to dma_mmap_attrs() and 39dma_free_attrs(). Make sure that both of these also get this attribute 40set on each call. 41 42Since it is optional for platforms to implement 43DMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the 44attribute and exhibit default behavior. 45 46DMA_ATTR_SKIP_CPU_SYNC 47---------------------- 48 49By default dma_map_{single,page,sg} functions family transfer a given 50buffer from CPU domain to device domain. Some advanced use cases might 51require sharing a buffer between more than one device. This requires 52having a mapping created separately for each device and is usually 53performed by calling dma_map_{single,page,sg} function more than once 54for the given buffer with device pointer to each device taking part in 55the buffer sharing. The first call transfers a buffer from 'CPU' domain 56to 'device' domain, what synchronizes CPU caches for the given region 57(usually it means that the cache has been flushed or invalidated 58depending on the dma direction). However, next calls to 59dma_map_{single,page,sg}() for other devices will perform exactly the 60same synchronization operation on the CPU cache. CPU cache synchronization 61might be a time consuming operation, especially if the buffers are 62large, so it is highly recommended to avoid it if possible. 63DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of 64the CPU cache for the given buffer assuming that it has been already 65transferred to 'device' domain. This attribute can be also used for 66dma_unmap_{single,page,sg} functions family to force buffer to stay in 67device domain after releasing a mapping for it. Use this attribute with 68care! 69 70DMA_ATTR_FORCE_CONTIGUOUS 71------------------------- 72 73By default DMA-mapping subsystem is allowed to assemble the buffer 74allocated by dma_alloc_attrs() function from individual pages if it can 75be mapped as contiguous chunk into device dma address space. By 76specifying this attribute the allocated buffer is forced to be contiguous 77also in physical memory. 78 79DMA_ATTR_ALLOC_SINGLE_PAGES 80--------------------------- 81 82This is a hint to the DMA-mapping subsystem that it's probably not worth 83the time to try to allocate memory to in a way that gives better TLB 84efficiency (AKA it's not worth trying to build the mapping out of larger 85pages). You might want to specify this if: 86 87- You know that the accesses to this memory won't thrash the TLB. 88 You might know that the accesses are likely to be sequential or 89 that they aren't sequential but it's unlikely you'll ping-pong 90 between many addresses that are likely to be in different physical 91 pages. 92- You know that the penalty of TLB misses while accessing the 93 memory will be small enough to be inconsequential. If you are 94 doing a heavy operation like decryption or decompression this 95 might be the case. 96- You know that the DMA mapping is fairly transitory. If you expect 97 the mapping to have a short lifetime then it may be worth it to 98 optimize allocation (avoid coming up with large pages) instead of 99 getting the slight performance win of larger pages. 100 101Setting this hint doesn't guarantee that you won't get huge pages, but it 102means that we won't try quite as hard to get them. 103 104.. note:: At the moment DMA_ATTR_ALLOC_SINGLE_PAGES is only implemented on ARM, 105 though ARM64 patches will likely be posted soon. 106 107DMA_ATTR_NO_WARN 108---------------- 109 110This tells the DMA-mapping subsystem to suppress allocation failure reports 111(similarly to __GFP_NOWARN). 112 113On some architectures allocation failures are reported with error messages 114to the system logs. Although this can help to identify and debug problems, 115drivers which handle failures (eg, retry later) have no problems with them, 116and can actually flood the system logs with error messages that aren't any 117problem at all, depending on the implementation of the retry mechanism. 118 119So, this provides a way for drivers to avoid those error messages on calls 120where allocation failures are not a problem, and shouldn't bother the logs. 121 122.. note:: At the moment DMA_ATTR_NO_WARN is only implemented on PowerPC. 123 124DMA_ATTR_PRIVILEGED 125------------------- 126 127Some advanced peripherals such as remote processors and GPUs perform 128accesses to DMA buffers in both privileged "supervisor" and unprivileged 129"user" modes. This attribute is used to indicate to the DMA-mapping 130subsystem that the buffer is fully accessible at the elevated privilege 131level (and ideally inaccessible or at least read-only at the 132lesser-privileged levels). 133 134DMA_ATTR_OVERWRITE 135------------------ 136 137This is a hint to the DMA-mapping subsystem that the device is expected to 138overwrite the entire mapped size, thus the caller does not require any of the 139previous buffer contents to be preserved. This allows bounce-buffering 140implementations to optimise DMA_FROM_DEVICE transfers. 141