1==============
2DMA attributes
3==============
4
5This document describes the semantics of the DMA attributes that are
6defined in linux/dma-mapping.h.
7
8DMA_ATTR_WEAK_ORDERING
9----------------------
10
11DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
12may be weakly ordered, that is that reads and writes may pass each other.
13
14Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
15those that do not will simply ignore the attribute and exhibit default
16behavior.
17
18DMA_ATTR_WRITE_COMBINE
19----------------------
20
21DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
22buffered to improve performance.
23
24Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
25those that do not will simply ignore the attribute and exhibit default
26behavior.
27
28DMA_ATTR_NON_CONSISTENT
29-----------------------
30
31DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either
32consistent or non-consistent memory as it sees fit.  By using this API,
33you are guaranteeing to the platform that you have all the correct and
34necessary sync points for this memory in the driver.
35
36DMA_ATTR_NO_KERNEL_MAPPING
37--------------------------
38
39DMA_ATTR_NO_KERNEL_MAPPING lets the platform to avoid creating a kernel
40virtual mapping for the allocated buffer. On some architectures creating
41such mapping is non-trivial task and consumes very limited resources
42(like kernel virtual address space or dma consistent address space).
43Buffers allocated with this attribute can be only passed to user space
44by calling dma_mmap_attrs(). By using this API, you are guaranteeing
45that you won't dereference the pointer returned by dma_alloc_attr(). You
46can treat it as a cookie that must be passed to dma_mmap_attrs() and
47dma_free_attrs(). Make sure that both of these also get this attribute
48set on each call.
49
50Since it is optional for platforms to implement
51DMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the
52attribute and exhibit default behavior.
53
54DMA_ATTR_SKIP_CPU_SYNC
55----------------------
56
57By default dma_map_{single,page,sg} functions family transfer a given
58buffer from CPU domain to device domain. Some advanced use cases might
59require sharing a buffer between more than one device. This requires
60having a mapping created separately for each device and is usually
61performed by calling dma_map_{single,page,sg} function more than once
62for the given buffer with device pointer to each device taking part in
63the buffer sharing. The first call transfers a buffer from 'CPU' domain
64to 'device' domain, what synchronizes CPU caches for the given region
65(usually it means that the cache has been flushed or invalidated
66depending on the dma direction). However, next calls to
67dma_map_{single,page,sg}() for other devices will perform exactly the
68same synchronization operation on the CPU cache. CPU cache synchronization
69might be a time consuming operation, especially if the buffers are
70large, so it is highly recommended to avoid it if possible.
71DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of
72the CPU cache for the given buffer assuming that it has been already
73transferred to 'device' domain. This attribute can be also used for
74dma_unmap_{single,page,sg} functions family to force buffer to stay in
75device domain after releasing a mapping for it. Use this attribute with
76care!
77
78DMA_ATTR_FORCE_CONTIGUOUS
79-------------------------
80
81By default DMA-mapping subsystem is allowed to assemble the buffer
82allocated by dma_alloc_attrs() function from individual pages if it can
83be mapped as contiguous chunk into device dma address space. By
84specifying this attribute the allocated buffer is forced to be contiguous
85also in physical memory.
86
87DMA_ATTR_ALLOC_SINGLE_PAGES
88---------------------------
89
90This is a hint to the DMA-mapping subsystem that it's probably not worth
91the time to try to allocate memory to in a way that gives better TLB
92efficiency (AKA it's not worth trying to build the mapping out of larger
93pages).  You might want to specify this if:
94
95- You know that the accesses to this memory won't thrash the TLB.
96  You might know that the accesses are likely to be sequential or
97  that they aren't sequential but it's unlikely you'll ping-pong
98  between many addresses that are likely to be in different physical
99  pages.
100- You know that the penalty of TLB misses while accessing the
101  memory will be small enough to be inconsequential.  If you are
102  doing a heavy operation like decryption or decompression this
103  might be the case.
104- You know that the DMA mapping is fairly transitory.  If you expect
105  the mapping to have a short lifetime then it may be worth it to
106  optimize allocation (avoid coming up with large pages) instead of
107  getting the slight performance win of larger pages.
108
109Setting this hint doesn't guarantee that you won't get huge pages, but it
110means that we won't try quite as hard to get them.
111
112.. note:: At the moment DMA_ATTR_ALLOC_SINGLE_PAGES is only implemented on ARM,
113	  though ARM64 patches will likely be posted soon.
114
115DMA_ATTR_NO_WARN
116----------------
117
118This tells the DMA-mapping subsystem to suppress allocation failure reports
119(similarly to __GFP_NOWARN).
120
121On some architectures allocation failures are reported with error messages
122to the system logs.  Although this can help to identify and debug problems,
123drivers which handle failures (eg, retry later) have no problems with them,
124and can actually flood the system logs with error messages that aren't any
125problem at all, depending on the implementation of the retry mechanism.
126
127So, this provides a way for drivers to avoid those error messages on calls
128where allocation failures are not a problem, and shouldn't bother the logs.
129
130.. note:: At the moment DMA_ATTR_NO_WARN is only implemented on PowerPC.
131
132DMA_ATTR_PRIVILEGED
133-------------------
134
135Some advanced peripherals such as remote processors and GPUs perform
136accesses to DMA buffers in both privileged "supervisor" and unprivileged
137"user" modes.  This attribute is used to indicate to the DMA-mapping
138subsystem that the buffer is fully accessible at the elevated privilege
139level (and ideally inaccessible or at least read-only at the
140lesser-privileged levels).
141