1===========
2ACPI Tables
3===========
4
5The expectations of individual ACPI tables are discussed in the list that
6follows.
7
8If a section number is used, it refers to a section number in the ACPI
9specification where the object is defined.  If "Signature Reserved" is used,
10the table signature (the first four bytes of the table) is the only portion
11of the table recognized by the specification, and the actual table is defined
12outside of the UEFI Forum (see Section 5.2.6 of the specification).
13
14For ACPI on arm64, tables also fall into the following categories:
15
16       -  Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT
17
18       -  Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT
19
20       -  Optional: AGDI, BGRT, CEDT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT,
21          HMAT, IBFT, IORT, MCHI, MPAM, MPST, MSCT, NFIT, PMTT, PPTT, RASF, SBST,
22          SDEI, SLIT, SPMI, SRAT, STAO, TCPA, TPM2, UEFI, XENV
23
24       -  Not supported: AEST, APMT, BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT,
25          MSDM, OEMx, PDTT, PSDT, RAS2, RSDT, SLIC, WAET, WDAT, WDRT, WPBT
26
27====== ========================================================================
28Table  Usage for ARMv8 Linux
29====== ========================================================================
30AEST   Signature Reserved (signature == "AEST")
31
32       **Arm Error Source Table**
33
34       This table informs the OS of any error nodes in the system that are
35       compliant with the Arm RAS architecture.
36
37AGDI   Signature Reserved (signature == "AGDI")
38
39       **Arm Generic diagnostic Dump and Reset Device Interface Table**
40
41       This table describes a non-maskable event, that is used by the platform
42       firmware, to request the OS to generate a diagnostic dump and reset the device.
43
44APMT   Signature Reserved (signature == "APMT")
45
46       **Arm Performance Monitoring Table**
47
48       This table describes the properties of PMU support implmented by
49       components in the system.
50
51BERT   Section 18.3 (signature == "BERT")
52
53       **Boot Error Record Table**
54
55       Must be supplied if RAS support is provided by the platform.  It
56       is recommended this table be supplied.
57
58BOOT   Signature Reserved (signature == "BOOT")
59
60       **simple BOOT flag table**
61
62       Microsoft only table, will not be supported.
63
64BGRT   Section 5.2.22 (signature == "BGRT")
65
66       **Boot Graphics Resource Table**
67
68       Optional, not currently supported, with no real use-case for an
69       ARM server.
70
71CEDT   Signature Reserved (signature == "CEDT")
72
73       **CXL Early Discovery Table**
74
75       This table allows the OS to discover any CXL Host Bridges and the Host
76       Bridge registers.
77
78CPEP   Section 5.2.18 (signature == "CPEP")
79
80       **Corrected Platform Error Polling table**
81
82       Optional, not currently supported, and not recommended until such
83       time as ARM-compatible hardware is available, and the specification
84       suitably modified.
85
86CSRT   Signature Reserved (signature == "CSRT")
87
88       **Core System Resources Table**
89
90       Optional, not currently supported.
91
92DBG2   Signature Reserved (signature == "DBG2")
93
94       **DeBuG port table 2**
95
96       License has changed and should be usable.  Optional if used instead
97       of earlycon=<device> on the command line.
98
99DBGP   Signature Reserved (signature == "DBGP")
100
101       **DeBuG Port table**
102
103       Microsoft only table, will not be supported.
104
105DSDT   Section 5.2.11.1 (signature == "DSDT")
106
107       **Differentiated System Description Table**
108
109       A DSDT is required; see also SSDT.
110
111       ACPI tables contain only one DSDT but can contain one or more SSDTs,
112       which are optional.  Each SSDT can only add to the ACPI namespace,
113       but cannot modify or replace anything in the DSDT.
114
115DMAR   Signature Reserved (signature == "DMAR")
116
117       **DMA Remapping table**
118
119       x86 only table, will not be supported.
120
121DRTM   Signature Reserved (signature == "DRTM")
122
123       **Dynamic Root of Trust for Measurement table**
124
125       Optional, not currently supported.
126
127ECDT   Section 5.2.16 (signature == "ECDT")
128
129       **Embedded Controller Description Table**
130
131       Optional, not currently supported, but could be used on ARM if and
132       only if one uses the GPE_BIT field to represent an IRQ number, since
133       there are no GPE blocks defined in hardware reduced mode.  This would
134       need to be modified in the ACPI specification.
135
136EINJ   Section 18.6 (signature == "EINJ")
137
138       **Error Injection table**
139
140       This table is very useful for testing platform response to error
141       conditions; it allows one to inject an error into the system as
142       if it had actually occurred.  However, this table should not be
143       shipped with a production system; it should be dynamically loaded
144       and executed with the ACPICA tools only during testing.
145
146ERST   Section 18.5 (signature == "ERST")
147
148       **Error Record Serialization Table**
149
150       On a platform supports RAS, this table must be supplied if it is not
151       UEFI-based; if it is UEFI-based, this table may be supplied. When this
152       table is not present, UEFI run time service will be utilized to save
153       and retrieve hardware error information to and from a persistent store.
154
155ETDT   Signature Reserved (signature == "ETDT")
156
157       **Event Timer Description Table**
158
159       Obsolete table, will not be supported.
160
161FACS   Section 5.2.10 (signature == "FACS")
162
163       **Firmware ACPI Control Structure**
164
165       It is unlikely that this table will be terribly useful.  If it is
166       provided, the Global Lock will NOT be used since it is not part of
167       the hardware reduced profile, and only 64-bit address fields will
168       be considered valid.
169
170FADT   Section 5.2.9 (signature == "FACP")
171
172       **Fixed ACPI Description Table**
173       Required for arm64.
174
175
176       The HW_REDUCED_ACPI flag must be set.  All of the fields that are
177       to be ignored when HW_REDUCED_ACPI is set are expected to be set to
178       zero.
179
180       If an FACS table is provided, the X_FIRMWARE_CTRL field is to be
181       used, not FIRMWARE_CTRL.
182
183       If PSCI is used (as is recommended), make sure that ARM_BOOT_ARCH is
184       filled in properly - that the PSCI_COMPLIANT flag is set and that
185       PSCI_USE_HVC is set or unset as needed (see table 5-37).
186
187       For the DSDT that is also required, the X_DSDT field is to be used,
188       not the DSDT field.
189
190FPDT   Section 5.2.23 (signature == "FPDT")
191
192       **Firmware Performance Data Table**
193
194       Optional, useful for boot performance profiling.
195
196GTDT   Section 5.2.24 (signature == "GTDT")
197
198       **Generic Timer Description Table**
199
200       Required for arm64.
201
202HEST   Section 18.3.2 (signature == "HEST")
203
204       **Hardware Error Source Table**
205
206       ARM-specific error sources have been defined; please use those or the
207       PCI types such as type 6 (AER Root Port), 7 (AER Endpoint), or 8 (AER
208       Bridge), or use type 9 (Generic Hardware Error Source).  Firmware first
209       error handling is possible if and only if Trusted Firmware is being
210       used on arm64.
211
212       Must be supplied if RAS support is provided by the platform.  It
213       is recommended this table be supplied.
214
215HMAT   Section 5.2.28 (signature == "HMAT")
216
217       **Heterogeneous Memory Attribute Table**
218
219       This table describes the memory attributes, such as memory side cache
220       attributes and bandwidth and latency details, related to Memory Proximity
221       Domains. The OS uses this information to optimize the system memory
222       configuration.
223
224HPET   Signature Reserved (signature == "HPET")
225
226       **High Precision Event timer Table**
227
228       x86 only table, will not be supported.
229
230IBFT   Signature Reserved (signature == "IBFT")
231
232       **iSCSI Boot Firmware Table**
233
234       Microsoft defined table, support TBD.
235
236IORT   Signature Reserved (signature == "IORT")
237
238       **Input Output Remapping Table**
239
240       arm64 only table, required in order to describe IO topology, SMMUs,
241       and GIC ITSs, and how those various components are connected together,
242       such as identifying which components are behind which SMMUs/ITSs.
243       This table will only be required on certain SBSA platforms (e.g.,
244       when using GICv3-ITS and an SMMU); on SBSA Level 0 platforms, it
245       remains optional.
246
247IVRS   Signature Reserved (signature == "IVRS")
248
249       **I/O Virtualization Reporting Structure**
250
251       x86_64 (AMD) only table, will not be supported.
252
253LPIT   Signature Reserved (signature == "LPIT")
254
255       **Low Power Idle Table**
256
257       x86 only table as of ACPI 5.1; starting with ACPI 6.0, processor
258       descriptions and power states on ARM platforms should use the DSDT
259       and define processor container devices (_HID ACPI0010, Section 8.4,
260       and more specifically 8.4.3 and 8.4.4).
261
262MADT   Section 5.2.12 (signature == "APIC")
263
264       **Multiple APIC Description Table**
265
266       Required for arm64.  Only the GIC interrupt controller structures
267       should be used (types 0xA - 0xF).
268
269MCFG   Signature Reserved (signature == "MCFG")
270
271       **Memory-mapped ConFiGuration space**
272
273       If the platform supports PCI/PCIe, an MCFG table is required.
274
275MCHI   Signature Reserved (signature == "MCHI")
276
277       **Management Controller Host Interface table**
278
279       Optional, not currently supported.
280
281MPAM   Signature Reserved (signature == "MPAM")
282
283       **Memory Partitioning And Monitoring table**
284
285       This table allows the OS to discover the MPAM controls implemented by
286       the subsystems.
287
288MPST   Section 5.2.21 (signature == "MPST")
289
290       **Memory Power State Table**
291
292       Optional, not currently supported.
293
294MSCT   Section 5.2.19 (signature == "MSCT")
295
296       **Maximum System Characteristic Table**
297
298       Optional, not currently supported.
299
300MSDM   Signature Reserved (signature == "MSDM")
301
302       **Microsoft Data Management table**
303
304       Microsoft only table, will not be supported.
305
306NFIT   Section 5.2.25 (signature == "NFIT")
307
308       **NVDIMM Firmware Interface Table**
309
310       Optional, not currently supported.
311
312OEMx   Signature of "OEMx" only
313
314       **OEM Specific Tables**
315
316       All tables starting with a signature of "OEM" are reserved for OEM
317       use.  Since these are not meant to be of general use but are limited
318       to very specific end users, they are not recommended for use and are
319       not supported by the kernel for arm64.
320
321PCCT   Section 14.1 (signature == "PCCT)
322
323       **Platform Communications Channel Table**
324
325       Recommend for use on arm64; use of PCC is recommended when using CPPC
326       to control performance and power for platform processors.
327
328PDTT   Section 5.2.29 (signature == "PDTT")
329
330       **Platform Debug Trigger Table**
331
332       This table describes PCC channels used to gather debug logs of
333       non-architectural features.
334
335
336PMTT   Section 5.2.21.12 (signature == "PMTT")
337
338       **Platform Memory Topology Table**
339
340       Optional, not currently supported.
341
342PPTT   Section 5.2.30 (signature == "PPTT")
343
344       **Processor Properties Topology Table**
345
346       This table provides the processor and cache topology.
347
348PSDT   Section 5.2.11.3 (signature == "PSDT")
349
350       **Persistent System Description Table**
351
352       Obsolete table, will not be supported.
353
354RAS2   Section 5.2.21 (signature == "RAS2")
355
356       **RAS Features 2 table**
357
358       This table provides interfaces for the RAS capabilities implemented in
359       the platform.
360
361RASF   Section 5.2.20 (signature == "RASF")
362
363       **RAS Feature table**
364
365       Optional, not currently supported.
366
367RSDP   Section 5.2.5 (signature == "RSD PTR")
368
369       **Root System Description PoinTeR**
370
371       Required for arm64.
372
373RSDT   Section 5.2.7 (signature == "RSDT")
374
375       **Root System Description Table**
376
377       Since this table can only provide 32-bit addresses, it is deprecated
378       on arm64, and will not be used.  If provided, it will be ignored.
379
380SBST   Section 5.2.14 (signature == "SBST")
381
382       **Smart Battery Subsystem Table**
383
384       Optional, not currently supported.
385
386SDEI   Signature Reserved (signature == "SDEI")
387
388       **Software Delegated Exception Interface table**
389
390       This table advertises the presence of the SDEI interface.
391
392SLIC   Signature Reserved (signature == "SLIC")
393
394       **Software LIcensing table**
395
396       Microsoft only table, will not be supported.
397
398SLIT   Section 5.2.17 (signature == "SLIT")
399
400       **System Locality distance Information Table**
401
402       Optional in general, but required for NUMA systems.
403
404SPCR   Signature Reserved (signature == "SPCR")
405
406       **Serial Port Console Redirection table**
407
408       Required for arm64.
409
410SPMI   Signature Reserved (signature == "SPMI")
411
412       **Server Platform Management Interface table**
413
414       Optional, not currently supported.
415
416SRAT   Section 5.2.16 (signature == "SRAT")
417
418       **System Resource Affinity Table**
419
420       Optional, but if used, only the GICC Affinity structures are read.
421       To support arm64 NUMA, this table is required.
422
423SSDT   Section 5.2.11.2 (signature == "SSDT")
424
425       **Secondary System Description Table**
426
427       These tables are a continuation of the DSDT; these are recommended
428       for use with devices that can be added to a running system, but can
429       also serve the purpose of dividing up device descriptions into more
430       manageable pieces.
431
432       An SSDT can only ADD to the ACPI namespace.  It cannot modify or
433       replace existing device descriptions already in the namespace.
434
435       These tables are optional, however.  ACPI tables should contain only
436       one DSDT but can contain many SSDTs.
437
438STAO   Signature Reserved (signature == "STAO")
439
440       **_STA Override table**
441
442       Optional, but only necessary in virtualized environments in order to
443       hide devices from guest OSs.
444
445TCPA   Signature Reserved (signature == "TCPA")
446
447       **Trusted Computing Platform Alliance table**
448
449       Optional, not currently supported, and may need changes to fully
450       interoperate with arm64.
451
452TPM2   Signature Reserved (signature == "TPM2")
453
454       **Trusted Platform Module 2 table**
455
456       Optional, not currently supported, and may need changes to fully
457       interoperate with arm64.
458
459UEFI   Signature Reserved (signature == "UEFI")
460
461       **UEFI ACPI data table**
462
463       Optional, not currently supported.  No known use case for arm64,
464       at present.
465
466WAET   Signature Reserved (signature == "WAET")
467
468       **Windows ACPI Emulated devices Table**
469
470       Microsoft only table, will not be supported.
471
472WDAT   Signature Reserved (signature == "WDAT")
473
474       **Watch Dog Action Table**
475
476       Microsoft only table, will not be supported.
477
478WDRT   Signature Reserved (signature == "WDRT")
479
480       **Watch Dog Resource Table**
481
482       Microsoft only table, will not be supported.
483
484WPBT   Signature Reserved (signature == "WPBT")
485
486       **Windows Platform Binary Table**
487
488       Microsoft only table, will not be supported.
489
490XENV   Signature Reserved (signature == "XENV")
491
492       **Xen project table**
493
494       Optional, used only by Xen at present.
495
496XSDT   Section 5.2.8 (signature == "XSDT")
497
498       **eXtended System Description Table**
499
500       Required for arm64.
501====== ========================================================================
502
503ACPI Objects
504------------
505The expectations on individual ACPI objects that are likely to be used are
506shown in the list that follows; any object not explicitly mentioned below
507should be used as needed for a particular platform or particular subsystem,
508such as power management or PCI.
509
510===== ================ ========================================================
511Name   Section         Usage for ARMv8 Linux
512===== ================ ========================================================
513_CCA   6.2.17          This method must be defined for all bus masters
514                       on arm64 - there are no assumptions made about
515                       whether such devices are cache coherent or not.
516                       The _CCA value is inherited by all descendants of
517                       these devices so it does not need to be repeated.
518                       Without _CCA on arm64, the kernel does not know what
519                       to do about setting up DMA for the device.
520
521                       NB: this method provides default cache coherency
522                       attributes; the presence of an SMMU can be used to
523                       modify that, however.  For example, a master could
524                       default to non-coherent, but be made coherent with
525                       the appropriate SMMU configuration (see Table 17 of
526                       the IORT specification, ARM Document DEN 0049B).
527
528_CID   6.1.2           Use as needed, see also _HID.
529
530_CLS   6.1.3           Use as needed, see also _HID.
531
532_CPC   8.4.7.1         Use as needed, power management specific.  CPPC is
533                       recommended on arm64.
534
535_CRS   6.2.2           Required on arm64.
536
537_CSD   8.4.2.2         Use as needed, used only in conjunction with _CST.
538
539_CST   8.4.2.1         Low power idle states (8.4.4) are recommended instead
540                       of C-states.
541
542_DDN   6.1.4           This field can be used for a device name.  However,
543                       it is meant for DOS device names (e.g., COM1), so be
544                       careful of its use across OSes.
545
546_DSD   6.2.5           To be used with caution.  If this object is used, try
547                       to use it within the constraints already defined by the
548                       Device Properties UUID.  Only in rare circumstances
549                       should it be necessary to create a new _DSD UUID.
550
551                       In either case, submit the _DSD definition along with
552                       any driver patches for discussion, especially when
553                       device properties are used.  A driver will not be
554                       considered complete without a corresponding _DSD
555                       description.  Once approved by kernel maintainers,
556                       the UUID or device properties must then be registered
557                       with the UEFI Forum; this may cause some iteration as
558                       more than one OS will be registering entries.
559
560_DSM   9.1.1           Do not use this method.  It is not standardized, the
561                       return values are not well documented, and it is
562                       currently a frequent source of error.
563
564\_GL   5.7.1           This object is not to be used in hardware reduced
565                       mode, and therefore should not be used on arm64.
566
567_GLK   6.5.7           This object requires a global lock be defined; there
568                       is no global lock on arm64 since it runs in hardware
569                       reduced mode.  Hence, do not use this object on arm64.
570
571\_GPE  5.3.1           This namespace is for x86 use only.  Do not use it
572                       on arm64.
573
574_HID   6.1.5           This is the primary object to use in device probing,
575		       though _CID and _CLS may also be used.
576
577_INI   6.5.1           Not required, but can be useful in setting up devices
578                       when UEFI leaves them in a state that may not be what
579                       the driver expects before it starts probing.
580
581_LPI   8.4.4.3         Recommended for use with processor definitions (_HID
582		       ACPI0010) on arm64.  See also _RDI.
583
584_MLS   6.1.7           Highly recommended for use in internationalization.
585
586_OFF   7.2.2           It is recommended to define this method for any device
587                       that can be turned on or off.
588
589_ON    7.2.3           It is recommended to define this method for any device
590                       that can be turned on or off.
591
592\_OS   5.7.3           This method will return "Linux" by default (this is
593                       the value of the macro ACPI_OS_NAME on Linux).  The
594                       command line parameter acpi_os=<string> can be used
595                       to set it to some other value.
596
597_OSC   6.2.11          This method can be a global method in ACPI (i.e.,
598                       \_SB._OSC), or it may be associated with a specific
599                       device (e.g., \_SB.DEV0._OSC), or both.  When used
600                       as a global method, only capabilities published in
601                       the ACPI specification are allowed.  When used as
602                       a device-specific method, the process described for
603                       using _DSD MUST be used to create an _OSC definition;
604                       out-of-process use of _OSC is not allowed.  That is,
605                       submit the device-specific _OSC usage description as
606                       part of the kernel driver submission, get it approved
607                       by the kernel community, then register it with the
608                       UEFI Forum.
609
610\_OSI  5.7.2           Deprecated on ARM64.  As far as ACPI firmware is
611		       concerned, _OSI is not to be used to determine what
612		       sort of system is being used or what functionality
613		       is provided.  The _OSC method is to be used instead.
614
615_PDC   8.4.1           Deprecated, do not use on arm64.
616
617\_PIC  5.8.1           The method should not be used.  On arm64, the only
618                       interrupt model available is GIC.
619
620\_PR   5.3.1           This namespace is for x86 use only on legacy systems.
621                       Do not use it on arm64.
622
623_PRT   6.2.13          Required as part of the definition of all PCI root
624                       devices.
625
626_PRx   7.3.8-11        Use as needed; power management specific.  If _PR0 is
627                       defined, _PR3 must also be defined.
628
629_PSx   7.3.2-5         Use as needed; power management specific.  If _PS0 is
630                       defined, _PS3 must also be defined.  If clocks or
631                       regulators need adjusting to be consistent with power
632                       usage, change them in these methods.
633
634_RDI   8.4.4.4         Recommended for use with processor definitions (_HID
635		       ACPI0010) on arm64.  This should only be used in
636		       conjunction with _LPI.
637
638\_REV  5.7.4           Always returns the latest version of ACPI supported.
639
640\_SB   5.3.1           Required on arm64; all devices must be defined in this
641                       namespace.
642
643_SLI   6.2.15          Use is recommended when SLIT table is in use.
644
645_STA   6.3.7,          It is recommended to define this method for any device
646       7.2.4           that can be turned on or off.  See also the STAO table
647                       that provides overrides to hide devices in virtualized
648                       environments.
649
650_SRS   6.2.16          Use as needed; see also _PRS.
651
652_STR   6.1.10          Recommended for conveying device names to end users;
653                       this is preferred over using _DDN.
654
655_SUB   6.1.9           Use as needed; _HID or _CID are preferred.
656
657_SUN   6.1.11          Use as needed, but recommended.
658
659_SWS   7.4.3           Use as needed; power management specific; this may
660                       require specification changes for use on arm64.
661
662_UID   6.1.12          Recommended for distinguishing devices of the same
663                       class; define it if at all possible.
664===== ================ ========================================================
665
666
667
668
669ACPI Event Model
670----------------
671Do not use GPE block devices; these are not supported in the hardware reduced
672profile used by arm64.  Since there are no GPE blocks defined for use on ARM
673platforms, ACPI events must be signaled differently.
674
675There are two options: GPIO-signaled interrupts (Section 5.6.5), and
676interrupt-signaled events (Section 5.6.9).  Interrupt-signaled events are a
677new feature in the ACPI 6.1 specification.  Either - or both - can be used
678on a given platform, and which to use may be dependent of limitations in any
679given SoC.  If possible, interrupt-signaled events are recommended.
680
681
682ACPI Processor Control
683----------------------
684Section 8 of the ACPI specification changed significantly in version 6.0.
685Processors should now be defined as Device objects with _HID ACPI0007; do
686not use the deprecated Processor statement in ASL.  All multiprocessor systems
687should also define a hierarchy of processors, done with Processor Container
688Devices (see Section 8.4.3.1, _HID ACPI0010); do not use processor aggregator
689devices (Section 8.5) to describe processor topology.  Section 8.4 of the
690specification describes the semantics of these object definitions and how
691they interrelate.
692
693Most importantly, the processor hierarchy defined also defines the low power
694idle states that are available to the platform, along with the rules for
695determining which processors can be turned on or off and the circumstances
696that control that.  Without this information, the processors will run in
697whatever power state they were left in by UEFI.
698
699Note too, that the processor Device objects defined and the entries in the
700MADT for GICs are expected to be in synchronization.  The _UID of the Device
701object must correspond to processor IDs used in the MADT.
702
703It is recommended that CPPC (8.4.5) be used as the primary model for processor
704performance control on arm64.  C-states and P-states may become available at
705some point in the future, but most current design work appears to favor CPPC.
706
707Further, it is essential that the ARMv8 SoC provide a fully functional
708implementation of PSCI; this will be the only mechanism supported by ACPI
709to control CPU power state.  Booting of secondary CPUs using the ACPI
710parking protocol is possible, but discouraged, since only PSCI is supported
711for ARM servers.
712
713
714ACPI System Address Map Interfaces
715----------------------------------
716In Section 15 of the ACPI specification, several methods are mentioned as
717possible mechanisms for conveying memory resource information to the kernel.
718For arm64, we will only support UEFI for booting with ACPI, hence the UEFI
719GetMemoryMap() boot service is the only mechanism that will be used.
720
721
722ACPI Platform Error Interfaces (APEI)
723-------------------------------------
724The APEI tables supported are described above.
725
726APEI requires the equivalent of an SCI and an NMI on ARMv8.  The SCI is used
727to notify the OSPM of errors that have occurred but can be corrected and the
728system can continue correct operation, even if possibly degraded.  The NMI is
729used to indicate fatal errors that cannot be corrected, and require immediate
730attention.
731
732Since there is no direct equivalent of the x86 SCI or NMI, arm64 handles
733these slightly differently.  The SCI is handled as a high priority interrupt;
734given that these are corrected (or correctable) errors being reported, this
735is sufficient.  The NMI is emulated as the highest priority interrupt
736possible.  This implies some caution must be used since there could be
737interrupts at higher privilege levels or even interrupts at the same priority
738as the emulated NMI.  In Linux, this should not be the case but one should
739be aware it could happen.
740
741
742ACPI Objects Not Supported on ARM64
743-----------------------------------
744While this may change in the future, there are several classes of objects
745that can be defined, but are not currently of general interest to ARM servers.
746Some of these objects have x86 equivalents, and may actually make sense in ARM
747servers.  However, there is either no hardware available at present, or there
748may not even be a non-ARM implementation yet.  Hence, they are not currently
749supported.
750
751The following classes of objects are not supported:
752
753       -  Section 9.2: ambient light sensor devices
754
755       -  Section 9.3: battery devices
756
757       -  Section 9.4: lids (e.g., laptop lids)
758
759       -  Section 9.8.2: IDE controllers
760
761       -  Section 9.9: floppy controllers
762
763       -  Section 9.10: GPE block devices
764
765       -  Section 9.15: PC/AT RTC/CMOS devices
766
767       -  Section 9.16: user presence detection devices
768
769       -  Section 9.17: I/O APIC devices; all GICs must be enumerable via MADT
770
771       -  Section 9.18: time and alarm devices (see 9.15)
772
773       -  Section 10: power source and power meter devices
774
775       -  Section 11: thermal management
776
777       -  Section 12: embedded controllers interface
778
779       -  Section 13: SMBus interfaces
780
781
782This also means that there is no support for the following objects:
783
784====   =========================== ====   ==========
785Name   Section                     Name   Section
786====   =========================== ====   ==========
787_ALC   9.3.4                       _FDM   9.10.3
788_ALI   9.3.2                       _FIX   6.2.7
789_ALP   9.3.6                       _GAI   10.4.5
790_ALR   9.3.5                       _GHL   10.4.7
791_ALT   9.3.3                       _GTM   9.9.2.1.1
792_BCT   10.2.2.10                   _LID   9.5.1
793_BDN   6.5.3                       _PAI   10.4.4
794_BIF   10.2.2.1                    _PCL   10.3.2
795_BIX   10.2.2.1                    _PIF   10.3.3
796_BLT   9.2.3                       _PMC   10.4.1
797_BMA   10.2.2.4                    _PMD   10.4.8
798_BMC   10.2.2.12                   _PMM   10.4.3
799_BMD   10.2.2.11                   _PRL   10.3.4
800_BMS   10.2.2.5                    _PSR   10.3.1
801_BST   10.2.2.6                    _PTP   10.4.2
802_BTH   10.2.2.7                    _SBS   10.1.3
803_BTM   10.2.2.9                    _SHL   10.4.6
804_BTP   10.2.2.8                    _STM   9.9.2.1.1
805_DCK   6.5.2                       _UPD   9.16.1
806_EC    12.12                       _UPP   9.16.2
807_FDE   9.10.1                      _WPC   10.5.2
808_FDI   9.10.2                      _WPP   10.5.3
809====   =========================== ====   ==========
810